Filter Design HDL Coder
Generate HDL code for fixed-point filters
The Filter Design HDL Coder™ product adds hardware implementation capability to MATLAB®. It lets you generate efficient, synthesizable, and portable VHDL and Verilog code for fixed-point filters that are designed with DSP System Toolbox™ software, for implementation in ASICs or FPGAs. It also automatically creates VHDL and Verilog test benches for quickly simulating, testing, and verifying the generated code.
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Writing VHDL is tedious, and the handwritten code still needs to be verified. With Simulink and Simulink HDL Coder, once we have simulated the model we can generate VHDL directly and prototype an FPGA. It saves a lot of time, and the generated code contains some optimizations we hadn’t thought of.
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