EDA Simulator Link IN 2.3
for Cadence Incisive

Cosimulate and verify VHDL® and Verilog® using Cadence Incisive simulators

Elaboration of floating-point reference algorithm and verification of Verilog implementation using cosimulation interface.

EDA Simulator Link™ IN is a cosimulation interface that integrates MATLAB® and Simulink® into the hardware design flow for the development of application-specific integrated circuits (ASICs) and field programmable gate arrays (FPGAs). It provides a bidirectional link between MATLAB and Simulink and Incisive® simulators (from Cadence Design Systems). EDA Simulator Link IN software enables you to verify your HDL design from within MATLAB and Simulink. It provides native cosimulation support for both VHDL® and Verilog®.

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Press Release: The MathWorks Expands Product Portfolio for Electronic System Verification
Press Release: The MathWorks Introduces Link for TASKING

Cadence and Incisive are registered trademarks of Cadence Design Systems, Inc. in the United States and/or other jurisdictions. Cadence's trademarks are used by The MathWorks, Inc. under license.

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EDA Simulator Link IN 2.3
for Cadence Incisive

Cosimulate and verify VHDL® and Verilog® using Cadence Incisive simulators

Get Pricing and
Licensing Options

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EDA Simulator Link IN 2.3 for Cadence Incisive

Cosimulate and verify VHDL® and Verilog® using Cadence Incisive simulators

Get Pricing andLicensing Options

Recorded Webinar

EDA Simulator Link IN 2.3
for Cadence Incisive

Get Pricing and
Licensing Options