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EDA Simulator Link™ DS (for Synopsys® Discovery™) 1.0

Cosimulate and verify VHDL® and Verilog® using Synopsys Discovery VCS™ MX


Elaboration of a floating-point reference algorithm and verification of a Verilog® implementation using a cosimulation interface.

EDA Simulator Link™ DS is a cosimulation interface that provides a fast bidirectional link between MATLAB® and Simulink® and the Synopsys® Discovery™ VCS™ MX family of simulators. The EDA Simulator Link™ DS product enables you to use MATLAB and Simulink with Synopsys Discovery for efficient validation of HDL code. It provides native cosimulation support for VHDL®, Verilog®, and mixed-language designs.


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