EDA Simulator Link™ DS (for Synopsys® Discovery™) 1.0

Product Description

• Introduction and Key Features
• Working with EDA Simulator Link™ DS
• Typical Applications
• Using EDA Simulator Link™ DS with MATLAB®
• Using EDA Simulator Link™ DS with Simulink®

Introduction

EDA Simulator Link™ DS is a cosimulation interface that provides a fast bidirectional link between MATLAB® and Simulink® and the Synopsys® Discovery™ VCS™ MX family of simulators. The EDA Simulator Link™ DS product enables you to use MATLAB and Simulink with Synopsys Discovery for efficient validation of HDL code. It provides native cosimulation support for VHDL®, Verilog®, and mixed-language designs.

With EDA Simulator Link DS, you can use MATLAB as a test bench providing stimulus and analyzing the response from an HDL component. MATLAB M-files can also be incorporated as components in a Discovery simulation model, enabling simulation of the complete system before all the HDL design elements are available.

EDA Simulator Link DS provides full two-way support for cosimulation using Simulink. You can substitute HDL implementations for blocks in a Simulink diagram or use Simulink models as test benches for HDL blocks from a Discovery simulation.

Key Features

• Full VHDL®, Verilog®, and mixed-language cosimulation support
• MATLAB® test bench capability, enabling the use of MATLAB code to stimulate HDL code and check its response
• MATLAB component capability, enabling simulation of MATLAB code in place of entities not yet coded in HDL
• User-selectable shared-memory and TCP/IP-socket communications modes
• Interactive or batch mode cosimulation, debugging, testing, and verification of HDL

Elaboration of a floating-point reference algorithm and verification of a Verilog® implementation using a cosimulation interface. Click on image to see enlarged view.