|Day 1 of 2|
|Preparing Simulink models for HDL code generation|
Objective: Prepare a Simulink model for HDL code generation. Generate HDL code and testbench for simple models requiring no optimization.
|Code Analysis and Fixed-Point Precision Control|
Objective: Establish correspondence between generated HDL code and specific Simulink blocks in the model. Use Fixed-Point Tool to finalize fixed point architecture of the model.
|Optimizing Generated HDL Code|
Objective: Use pipelines to meet design timing requirements. Use specific hardware implementations and share resources for area optimization.
|Day 2 of 2|
|Generating HDL Code from the MATLAB Function Block|
Objective: Generate HDL code when part of the design is written in MATLAB using the MATLAB Function block. Use and adapt blocks from the design patterns library for your own design. Write MATLAB code for fixed point operations.
|Interfacing External HDL Code with Generated HDL|
Objective: Incorporate hand-written HDL code and/or vendor party IP in your design.
|Generating HDL Code for Multirate Models|
Objective: Generate HDL code for multirate designs
|Verifying HDL Code with Cosimulation|
Objective: Verify your HDL code using an HDL simulator in the Simulink model.