Mixed-Signal Systems

PLL Design

SPICE models are accurate, but extremely slow when it comes to phase-locked loop (PLL) design. The feedback loop is a difficult challenge for the underlying SPICE simulation engine. By contrast, Simulink® takes a different simulation approach that results in very fast PLL design. With its control design heritage, Simulink has a simulation engine that is extremely efficient at simulating systems with feedback loops. The combination of behavioral modeling and a faster approach to simulation enables engineers to cut simulation times for PLL designs from days to hours or minutes.

Because of these much shorter PLL design times, many companies have adopted Simulink for PLL design. Liu Xin, staff design engineer at IDT-Newave reports: "In just one month, our system-level engineers and circuit designers determined optimal jitter performance with PLLs."

These time-saving benefits also extend to more recent all-digital PLL designs, as Russell Mohn of Epoch Microelectronics explains: "Simulink behavioral simulation is much faster than circuit-level simulation, and as a result, we can complete many simulations in one day, experimenting with different implementation ideas for the functional blocks."