Accelerating the pace of engineering and science

Implementing MATLAB Algorithms in FPGAs and ASICs

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Sudeepa Prakash, MathWorks

In this webinar learn how you can leverage HDL Coder to accelerate your FPGA design cycle and avoid costly mistakes. Using HDL Coder you can perform rapid prototyping on FPGAs or implement your HDL design on ASICs and FPGAs directly from MATLAB.

Discussion topics include:

  • Verilog and VHDL code generation from MATLAB using HDL Coder
  • Optimization techniques for efficient FPGA implementation
  • Programming your HDL code on FPGA boards
  • FPGA-in-the-loop verification

About the Presenter:
Sudeepa Prakash is an HDL and embedded code generation product marketing manager at MathWorks. Prior to joining MathWorks, Sudeepa was an embedded software engineer at Johnson Controls Inc.  Sudeepa has also worked on digital modules for radars using HDL code generation with scientists at LRDE in India. She has a master’s degree in computer science from the University of Wisconsin- Milwaukee and a bachelor’s degree in electronics and communications from Visvesvaraya Technological University.

Product Focus

  • HDL Coder
  • HDL Verifier
  • Filter Design HDL Coder

Recorded: 27 Aug 2012