FPGA, ASIC, and SoC Development with MATLAB & Simulink: 2023 North America Webinar Series
Overview
MATLAB and Simulink are used by engineers working on projects that target FPGA or ASIC hardware for both prototyping and production projects. On this part 1 of 3 webinar series, we outline proven techniques for connecting algorithm development with FPGA and ASIC design and verification, where you’ll learn how to use MathWorks HDL products to:
- Develop algorithms for hardware implementation at a high level of abstraction using MATLAB and Simulink
- Build testbenches that include digital and analog hardware and software, along with models of the operating environment
- Convert models to fixed-point using automated guidance or generate native floating-point operations for any target device
- Generate optimized, readable, and traceable VHDL or Verilog code
- Use HDL toolboxes to accelerate development of signal processing, wireless communications, embedded vision, and deep learning applications
- Analyze hardware and software architectures by modeling memories, buses, and I/Os
- Verify algorithms using HDL simulators or development boards with MATLAB and Simulink testbenches, and export SystemVerilog and UVM verification components to HDL simulators
Date | Topic | |
---|---|---|
3 May 2023 |
From Algorithms to FPGA / ASIC Implementation with MATLAB and Simulink |
Watch video (57:05) |
18 May 2023 |
FPGA Verification and Debugging Workflows with MATLAB and Simulink |
Watch video (51:22) |
22 Jun 2023 |
Accelerating Functional Verification and RTL Testbench Development with MATLAB and Simulink |
Watch video (43:39) |
3 Aug 2023 |
A Workflow For Deploying Wireless Applications on FPGAs with MATLAB and Simulink |
Watch video (54:25) |
7 Sep 2023 |
From MATLAB to Optimized RTL in Minutes with HDL Coder and Cadence Stratus HLS |
Watch video (42:01) |