Skip to Main Content

Recorded Webinar Series: FPGA Design Using MATLAB and Simulink

In these webinars, MathWorks and Xilinx engineers demonstrate how HDL code generation tools from MATLAB® and Simulink® can significantly accelerate your FPGA design cycle. Through a series of demonstrations, the presenters show how to build system models in Simulink, elaborate models for FPGA implementation, apply optimizations for improved timing and reduced FPGA resource usage, and verify implementations using accelerated hardware simulation—also known as FPGA-in-the-loop—on Xilinx development boards.

Applications and Topics Discussed

  • Image processing
  • Closed-loop motor control
  • Using Xilinx System Generator for DSP in combination with HDL Coder
  • Verifying generated HDL with on Xilinx development boards using FPGA-in-the-loop
  • Linking requirements to Simulink and to generated HDL

Product Focus