- Introduce Xilinx Versal ACAP platform and AI Engine processing technology
- Use Simulink and Vitis Model Composer to design, simulate and optimize a 4GSPS Filter using super sample rate architecture
- Target filter design to AI Engines and programmable logic
- Show a hardware demonstration
Please allow approximately 45 minutes to attend the presentation and Q&A session. We will be recording this webinar, so if you can't make it for the live broadcast, register and we will send you a link to watch it on-demand.
About the Presenters
Olivier Tremois is a Technical Marketing Manager at Xilinx responsible for the AI Engine Training and developed several tutorials on AI Engine processor array. Before that, he was a DSP Specialist covering EMEA and India for 15 years. Prior to Xilinx, he worked at Thales in active and passive sonar system research and development, and he spent 5 years in a telecom startup on PHY layer implementation. He holds a PhD in Digital Signal Processing obtained in 1995.
John Pitrus is a Partner Manager at MathWorks concentrating on FPGA, ASIC and SoC workflows for general-purpose applications. Prior to MathWorks, he served in various marketing and product application roles at Analog Devices, Dell EMC and Conexant. John holds a BS in Computer Engineering from Rensselaer Polytechnic Institute and an MBA in Marketing from University of Chicago Booth School of Business.