In addition to ASICs, FPGAs and SoCs are playing an increasing role across a growing number of systems and applications due to their unique attributes of flexibility, high throughput, low latency and per watt performance.
A key success factor in multidisciplinary FPGA, SoC and ASIC projects is efficient communication and collaboration across teams as well as early validation and verification of the design.
Quickly reacting to changing requirements in dynamic business environments such as autonomous and robotic systems is a significant competitive advantage.
Functional safety requirements impose an additional challenge in automotive, medical, railway and other industries.
In this webinar we discuss an integrated workflow for designing and implementing signal processing, control and vision algorithms on FPGAs, ASICs and SoCs while addressing the above listed challenges. We briefly cover the process from requirements authoring, to architectural modeling, go over modeling for implementation, then to HDL code generation, with verification and validation at each step. We show how the integrated Model-Based Design toolchain helps you streamline compliance with functional safety standards such as ISO 26262, IEC 61508 or IEC 62304.
