Illustrates how to generate HDL code for a 5th order Butterworth filter. The cutoff-frequency for this filter is very low relative to the sample rate, leading to a filter that is difficult to
Illustrates how to generate HDL code for a Digital Up-Converter (DUC). A DUC is a digital circuit which converts a digital baseband signal to a passband signal. The input baseband signal is
Design and implement hardware efficient Sample Rate Converters for an arbitrary factor using polynomial-based (Farrow) structures. Sample Rate Conversion (SRC) between arbitrary
Illustrates how to generate HDL code for an ITU-R BT.601 luma filter with 8-bit input data and 10-bit output data. This filter is a low-pass filter with a -3 dB point of 3.2 MHz with a 13.5 MHz
Illustrates how to generate HDL code for a symmetrical FIR filter with fully parallel, fully serial, partly serial and cascade-serial architectures for a lowpass filter for an audio
Illustrates how to generate HDL code for bank of 24 first-order shelving filters that implement an audio tone control with 1 dB steps from -6 dB to +6 dB for bass and treble.
Use the DSP System Toolbox™ and Fixed-Point Designer™ to design a three-stage, multirate, fixed-point filter that implements the filter chain of a Digital Down-Converter (DDC) designed
Illustrates how to generate HDL code for an inverse sinc (sin x/x) peaking filter that adds preemphasis to compensate for the inherent sinc response of the digital-to-analog converter