Generate a SystemVerilog DPI component from a proportional-integral-derivative (PID) controller in a Simulink® model, and export it to an HDL simulator.
Verify generated HDL code using HDL Cosimulation and FPGA-in-the-Loop as steps in the HDL code generation workflow for MATLAB to HDL.
Generate a SystemVerilog DPI component for a programmable square-wave generator written in MATLAB, and export it to an HDL simulator.
Set up an FPGA-in-the-Loop (FIL) application using HDL Verifier™. The application uses Simulink® and an FPGA development board to verify the HDL implementation of a
Achieve complete code coverage of an HDL cruise controller design using Simulink® and Cadence® Incisive®.
Customize the generated SystemVerilog code in the SystemVerilog DPI Component Generation process.
Guides you through the basic steps for setting up an HDL Verifier™ application using the Cosimulation Wizard.
Configure a Simulink® model to generate a SystemC™/TLM component using the tlmgenerator target for either Simulink Coder or Embedded Coder™.
Achieve complete code coverage of an HDL cruise controller design using Simulink® and ModelSim®.
Guides you through the basic steps for setting up an HDL Verifier™ application using Cosimulation Wizard.
This tutorial guides you through the basic steps for setting up an HDL Verifier™ application using Cosimulation Wizard.
MODSIMSPECDISP shows how MATLAB® can be used to implement a VHDL component that is used to display the spectrum of a signal from a VHDL project in ModelSim®. This example compiles a VHDL source
Verification of a Manchester encoder using HDL Verifier with Simulink. Manchester encoding is a simple modulation scheme that converts baseband digital data to an encoded waveform with no
Use HDL Verifier™ in conjunction with ModelSim® to verify HDL code for a fixed-point Viterbi decoder.
MODSIMOSC shows how MATLAB® can be used to implement a filter component used in a VHDL model. The example compiles a VHDL oscillator, defines a filter component that is modeled using MATLAB,
Verification of a Manchester encoder using mixed HDL languages, VHDL and Verilog. Manchester encoding is a simple modulation scheme which converts baseband digital data into an encoded
Illustrates the various Timescale settings within the HDL Cosimulation block and explains how these affect the timing relationship of Simulink® and the HDL simulator. We use a simple
The Manchester Receiver example shows how to use the HDL Verifier™ to design, test, and verify a VHDL Manchester Receiver model with clock recovery capabilities.
Verification of a Manchester encoder using Simulink and HDL Verifier. Manchester encoding is a simple modulation scheme that converts baseband digital data to an encoded waveform with no
Illustrates running ModelSim® HDL Simulator in batch mode to test an HDL component with a MATLAB® test bench. In this demonstration, we compile an HDL low-pass filter - designed and
Verification of a Manchester encoder. Manchester encoding is a simple modulation scheme that converts baseband digital data to an encoded waveform with no DC component. The most widely
Use MATLAB® System objects and Mentor Graphics® ModelSim® to cosimulate a Viterbi decoder implemented in VHDL.
Illustrates using MATLAB® to start ModelSim® in batch mode and performing cosimulation with Simulink® using the HDL Verifier™ HDL Cosimulation block.
These examples demonstrate charting with the fanChart visualization function
The tidal fitting toolbox simplifies the task of fitting tide models to time series. It is split into a tidalfit and a tidalval functions using the the familiar structure of polyfit and
Use the model metrics API to collect model metric data for your model, and then explore the results by using the Metrics Dashboard.
Collect model metric data by using the Metrics Dashboard. From the dashboard, explore detailed compliance results and, fix compliance issues by using the Model Advisor.
The application of coverage analysis to a simple design problem and compares the coverage requirements for different metrics.
Configure an S-Function generated with the Legacy Code Tool to be compatible with coverage. The model coverage tool supports S-Functions that are:
Use the overloaded operators +, *, and - to combine coverage results into a union, intersection, or set difference of results.
Simulate this model to collect and report Saturate on integer overflow coverage.
Use the dialog box for coverage settings to enable coverage for a Simulink® model and adjust the type of information that is reported.
How coverage information for a model is bundled in the cvdata object and how utility commands can extract information from it for an individual subsystem, block, or Stateflow® object.
This model includes various patterns of cascaded Logical Operator blocks. This example illustrates the criteria by which logic block cascades are identified for the purpose of model
Model explains how Model Coverage relates to MATLAB code inside a MATLAB Function Block.
Illustrates the use of the Coverage Results Explorer to simplify the generation of cumulative coverage data and reports spanning a set of multiple coverage runs.
Creates three test cases for an adjustable rate limiter and analyzes the resulting model coverage using the command-line API of the Model Coverage tool.
Use a model reference in either SIL or Normal simulation mode to collect model or code coverage metrics with Simulink® Coverage™.
Use Simulink® Coverage™ model coverage filters to exclude model items from coverage recording and justify missing coverage in reports.
Illustrates how Simulink® Coverage™ records the MCDC metric for a cascade of Logical Operator blocks.
Verify generated code for a model component. You use component verification functions to create test cases and measure coverage for a referenced model. In addition, you execute the
Use Simulink® Design Verifier™ functions to log input signals, create a harness model, generate test cases for missing coverage, merge harness models, and execute test cases.
Use Simulink® Design Verifier™ functions to replace unsupported blocks and to how customize test vector generation for specific requirements.
Verify the seat belt reminder design model referenced in the top block above.
Verify the seat belt reminder design model referenced in the top block above.
How Simulink® Design Verifier™ can extend test cases with additional time steps to efficiently generate complete test suites.
Use Simulink® Design Verifier™ to extend an existing test suite to obtain missing model coverage.
How Simulink® Design Verifier™ can target its analysis to a single subsystem within a continuous-time closed-loop simulation and generate test cases for missing coverage in that
Verify safety properties in a thrust reverser design model.
Model temporal system requirements in a power window controller model for property proving and test case generation using Simulink® Design Verifier™ Temporal Operator blocks.
Find a property violation using Simulink Design Verifier property proving analysis.
Perform a Simulink Design Verifier property proof using a Proof Assumption block.
Use input port minimum and maximum values as analysis constraints by Simulink Design Verifier during both test generation and property proving.
Model temporal system requirements for property proving and test case generation using Simulink® Design Verifier™ Temporal Operator blocks.
Prove properties in a fixed-point cruise control algorithm.
Use Simulink® Design Verifier™ command-line functions to generate test data that incorporates different parameter values.
Generate test cases that satisfy Decision, Condition, and MCDC coverage.
Generate test cases that achieve complete model coverage for a debouncer.
Traceability management support in the MATLAB Editor is an extension of the Simulink-based Requirements Management Interface to allow associations between MATLAB code lines and
Requirements Management Interface (RMI) provides tools for creating and reviewing links between Simulink objects and requirements documents. This example illustrates linking model
You can use Simulink to model your design requirements. For example, you can use verification blocks to specify desired system properties and model the design requirements. The
The requirements report is a feature in RMI that scans the Simulink model for links to external requirements documents and generates a report. When documents are available for reading
Simulink Requirements supports two different ways to store link data for Simulink models: you can either embed link data in the .slx file, or you can store links in an external .slmx file
The Requirements Management Interface (RMI) provides tools for creating and reviewing links between Simulink objects and requirements documents. This example illustrates linking
Requirements Management Interface (RMI) provides tools for creating and reviewing links between model-based design elements and requirements documents. RMI provides built-in support
Demonstrates the basic steps to update Requirements Management Interface (RMI) links to the format used by the new Simulink Requirements interface. Legacy RMI data consists of
Generate test cases based on model hierarchy. Copyright 2015 The MathWorks, Inc.
Increase coverage of a test case by generating tests using Simulink® Design Verifier™. Copyright 2016 The MathWorks, Inc.
Perform code generation verification for a model. Copyright 2015 The MathWorks, Inc.
Report test results for a baseline test. Copyright 2015 The MathWorks, Inc.
Verify a model against a baseline using a parameter override and the Test Manager. Copyright 2015 The MathWorks, Inc.
Change test harness settings for different verification objectives.
Demonstrates how to test a transmission shift logic controller using test sequences and test assessments.
Test and optimize a physical system using a test sequence, test harness, and the test manager. Copyright 2015 The MathWorks, Inc.
Synchronize and rebuild a test harness from the main model.
Demonstrates cloning an existing test harness and exporting the cloned harness to a separate model. This can be useful if you want to create a copy of a test harness as a separate model, but
Test a transmission controller using a test harness and test sequence.
Reuse test assessments contained in a test sequence block using a linked block from a library.
Use waveforms to test a component under test. Copyright 2015 The MathWorks, Inc.
Verify a reusable subsystem in a library and in a larger system. Copyright 2016 The MathWorks, Inc.
Perform real-time testing on a target computer and verify system behavior against requirements. Copyright 2016 The MathWorks, Inc.
Using a custom criteria script, verify that wing oscillations are damped in multiple altitude and airspeed conditions.
Set and get custom criteria using the programmatic interface.