Strategy 2: Local Oversampling
To model your design at the data rate and selectively increase the sample rate of blocks for which HDL Coder™ is unable to allocate delays, use local oversampling. These blocks then operate at the faster clock rate and can accommodate the required number of delays.
If you open the RunningSum_OSmanual model and navigate to the Add block, it shows how you can increase the sample rate of the Add block and allocate delays.
- The blocks that are within the boundary of the Repeat and Zero Order Hold blocks operate at the clock rate that is 12 times faster than the sample rate of the model.
- The subsystem has a Delay block of length 12 at the output of the Add block. When generating code, the Add block absorbs this Delay block, which compensates for the latency of the operator. To balance delays, the subsystem contains Delay blocks of length 12 in other paths.
You can now generate HDL code for the CumSum_sl subsystem. To generate HDL code for the CumSum_Sl Subsystem, right-click the subsystem and select HDL Code > Generate HDL for Subsystem.