SPICE PJFET

SPICE-compatible P-Channel JFET

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  • Simscape / Electrical / Additional Components / SPICE Semiconductors

Description

The SPICE PJFET block represents a SPICE-compatible P-channel junction field-effect transistor (PJFET). If the voltage applied to the gate port, gx, is greater than the voltage applied to the source port, sx, the current between the source port and drain port, dx, is reduced.

SPICE, or Simulation Program with Integrated Circuit Emphasis, is a simulation tool for electronic circuits. You can convert some SPICE subcircuits into equivalent Simscape™ Electrical™ models using the Environment Parameters block and SPICE-compatible blocks from the Additional Components library. For more information, see subcircuit2ssc.

Equations

Variables for the SPICE PJFET block equations include:

  • Variables that you define by specifying parameters for the SPICE PJFET block. The visibility of some of the parameters depends on the value that you set for other parameters. For more information, see Parameters.

  • Geometry-adjusted variables, which depend on several of the values that you specify using parameters for the SPICE PJFET block. For more information, see Geometry-Adjusted Variables.

  • Temperature, T, which is 300.15 K by default. You can use a different value by specifying parameters for the SPICE PJFET block or by specifying parameters for both the SPICE PJFET block and an Environment Parameters block. For more information, see Transistor Temperature.

  • Temperature-dependent variables. For more information, see Temperature Dependence.

  • Minimal conductance, GMIN, which is 1e-12 1/Ohm by default. You can use a different value by specifying a parameter for an Environment Parameters block. For more information, see Minimal Conduction.

Geometry-Adjusted Variables

Several variables in the equations for the P-channel junction field-effect transistor model consider the geometry of the device that the block represents. These geometry-adjusted variables depend on variables that you define by specifying SPICE PJFET block parameters. The geometry-adjusted variables depend on these variables:

  • AREA — Area of the device

  • SCALE — Number of parallel connected devices

  • The associated unadjusted variable

The table includes the geometry-adjusted variables and the defining equations.

VariableDescriptionEquation
BETAdGeometry-adjusted transconductance

BETAd=BETA*AREA*SCALE

CGDdGeometry-adjusted zero-bias gate-drain capacitance

CGDd=CGD*AREA*SCALE

CGSdGeometry-adjusted zero-bias gate-source capacitance

CGSd=CGS*AREA*SCALE

ISdGeometry-adjusted saturation current

ISd=IS*AREA*SCALE

RSdGeometry-adjusted source resistance

RSd=RSAREA*SCALE

RDdGeometry-adjusted drain resistance

RDd=RDAREA*SCALE

Transistor Temperature

You can use these options to define transistor temperature, T:

  • Fixed temperature — The block uses a temperature that is independent of the circuit temperature when the Model temperature dependence using parameter in the Temperature settings of the SPICE PJFET block is set to Fixed temperature. For this model, the block sets T equal to TFIXED.

  • Device temperature — The block uses a temperature that depends on circuit temperature when the Model temperature dependence using parameter in the Temperature settings of the SPICE PJFET block is set to Device temperature. For this model, the block defines temperature as

    T=TC+TOFFSET

    Where:

    • TC is the circuit temperature.

      If there is not an Environment Parameters block in the circuit, TC is equal to 300.15 K.

      If there is an Environment Parameters block in the circuit, TC is equal to the value that you specify for the Temperature parameter in the SPICE settings of the Environment Parameters block. The default value for the Temperature parameter is 300.15 K.

    • TOFFSET is the offset local circuit temperature.

Minimal Conduction

Minimal conductance, GMIN, has a default value of 1e–12 1/Ohm. To specify a different value:

  1. If there is not an Environment Parameters block in the transistor circuit, add one.

  2. In the SPICE settings of the Environment Parameters block, specify the desired GMIN value for the GMIN parameter.

Source-Gate Current-Voltage Model

This table shows the equations that define the relationship between the source-gate current, Isg, and the source-gate voltage, Vsg. As applicable, the model parameters are first adjusted for temperature. For more information, see Temperature Dependence.

Applicable Range of Vsg ValuesCorresponding Isg Equation

Vsg>80*Vt

Isg=ISd*((VsgVt79)e801)+Vsg*Gmin

80*VtVsg

Isg=ISd*(eVsg/Vt1)+Vsg*Gmin

Where:

  • ISd is the geometry-adjusted saturation current.

  • Vt is the thermal voltage, such that Vt=ND*k*T/q.

  • ND is the emission coefficient.

  • q is the elementary charge on an electron.

  • k is the Boltzmann constant.

  • T is the transistor temperature. For more information, see Transistor Temperature

  • GMIN is the transistor minimum conductance. or more information, see Minimal Conduction

Drain-Gate Current-Voltage Model

This table shows the relationship between the drain-gate current, Idg, and the drain-gate voltage, Vdg. As applicable, model parameters are first adjusted for temperature.

Applicable Range of Vdg ValuesCorresponding Idg Equation

Vdg>80*Vt

Idg=ISd*((VdgVt79)e801)+Vdg*Gmin

80*VtVdg

Idg=ISd*(eVdg/Vt1)+Vdg*Gmin

Source-Drain Current-Voltage Model

This table shows the relationship between the source-drain current, Isd, and the source-drain voltage, Vsd, in normal mode (Vsd ≥ 0). As applicable, model parameters are first adjusted for temperature.

Applicable Range of Vsg and Vdg ValuesCorresponding Isd Equation

Vsg-Vto0

Isd=0

0<Vsg-VtoVsd

Isd=βd(VsgVto)2(1+λVsd)

0<Vsd<Vsg-Vto

Isd=βdVsd(2(Vsg-Vto)-Vsd)(1+λVsd)

Where:

  • Vto is the threshold voltage.

  • βd is the geometry-adjusted transconductance.

  • λ is the channel modulation.

This table shows the relationship between the source-drain current, Isd, and the source-drain voltage, Vsd, in inverse mode (Vsd < 0). As applicable, model parameters are first adjusted for temperature.

Applicable Range of Vsggs and Vdg ValuesCorresponding Isd Equation

Vdg-Vto0

Isd=0

0<Vdg-VtoVsd

Isd=βd(VdgVto)2(1λVsd)

0<Vsd<Vdg-Vto

Isd=βdVsd(2(Vdg-Vto)+Vsd)(1λVsd)

Junction Charge Model

This table shows the relationship between the source-gate charge, Qsg, and the source-gate voltage, Vsg. As applicable, model parameters are first adjusted for temperature.

Applicable Range of Vsg ValuesCorresponding Qsg Equation
Vsg<FC*VJQsg=CGSd*VJ*(1-(1-VsgVJ)1MG)1MG
VsgFC*VJ

Qsg=CGSd*(F1+F3*(Vsg-FC*VJ)+MG*(Vsg2-(FC*VJ)2)2*VJF2)

Where:

  • FC is the capacitance coefficient.

  • VJ is the junction potential.

  • CGSd is the zero-bias gate-source capacitance.

  • MG is the grading coefficient.

  • F1=VJ*(1-(1-FC)1MG)1MG

  • F2=(1-FC)1+MG

  • F3=1-FC*(1+MG)

This table shows the relationship between the drain-gate charge, Qdg, and the drain-gate voltage, Vdg. As applicable, model parameters are first adjusted for temperature.

Applicable Range of Vdg ValuesCorresponding Qdg Equation
Vdg<FC*VJQdg=CGDd*VJ*(1-(1-VdgVJ)1MG)1MG
VdgFC*VJQdg=CGDd*(F1+F3*(Vdg-FC*VJ)+MG*(Vdg2-(FC*VJ)2)2*VJF2)

Where:

  • CGDd is the geometry-adjusted zero-bias gate-drain capacitance.

Temperature Dependence

The block provides this relationship between the saturation current IS and the transistor temperature T:

IS(T)=ISd*(T/Tmeas)XTIND*e(TTmeas1)*EGVt

Where:

  • ISd is the geometry-adjusted saturation current.

  • Tmeas is the parameter extraction temperature.

  • XTI is the saturation current temperature exponent.

  • EG is the energy gap.

  • Vt is the thermal voltage, such that Vt=ND*k*T/q.

  • ND is the emission coefficient.

The relationship between the junction potential, VJ, and the transistor temperature T is

VJ(T)=VJ*(TTmeas)-3*k*Tq*log(TTmeas)-(TTmeas)*EGTmeas+EGT

Where:

  • VJ is the junction potential.

  • EGTmeas=1.16eV-(7.02e-4*Tmeas2)/(Tmeas+1108)

  • EGT=1.16eV-(7.02e-4*T2)/(T+1108)

The relationship between the gate-source junction capacitance, CGS, and the transistor temperature, T:

CGS(T) = CGSd*[1+MG*(400e6*(T-Tmeas)-VJ(T)-VJVJ)]

Where:

  • CGSd is the geometry-adjusted zero-bias gate-source capacitance.

The block uses the CGS(T) equation to calculate the gate-drain junction capacitance by substituting CGDd, the zero-bias gate-drain capacitance, for CGSd.

The relationship between the transconductance, β, and the transistor temperature T is

β(T)=βd*(TTmeas)

Where βd is the geometry-adjusted transconductance.

Assumptions and Limitations

  • The block does not support noise analysis.

  • The block applies initial conditions across junction capacitors and not across the block ports.

Ports

Conserving

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Electrical conserving port associated with the transistor gate terminal.

Electrical conserving port associated with the transistor drain terminal.

Electrical conserving port associated with the transistor source terminal.

Parameters

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Main

Transistor area. The value must be greater than 0.

Number of parallel transistors the block represents. The value must be an integer greater than 0.

Source-gate voltage above which the transistor produces a nonzero drain current.

Derivative of drain current with respect to gate voltage. The value must be greater than or equal to 0.

Channel modulation.

Magnitude of the current that the gate-current equation approaches asymptotically for very large reverse bias levels. The value must be greater than or equal to 0.

Transistor drain resistance. The value must be greater than or equal to 0.

Transistor source resistance. The value must be greater than or equal to 0.

Transistor emission coefficient or ideality factor. The value must be greater than 0.

Junction Capacitance

Options for modeling the junction capacitance:

  • No — Do not include junction capacitance in the model.

  • Yes — Specify zero-bias junction capacitance, junction potential, grading coefficient, forward-bias depletion capacitance coefficient, and transit time.

Dependencies

Selecting Yes exposes related parameters.

Value of the capacitance placed between the gate and the source. The value must be greater than or equal to 0.

Dependencies

This parameter is only visible when you select Yes for the Model junction capacitance parameter.

Value of the capacitance placed between the gate and the drain. The value must be greater than or equal to 0.

Dependencies

This parameter is only visible when you select Yes for the Model junction capacitance parameter.

Junction potential, VJ. The value must be greater than 0.01 V.

Dependencies

This parameter is only visible when you select Yes for the Model junction capacitance parameter.

Grading coefficient, M. The value must be greater than 0 and less than 0.9.

Dependencies

This parameter is only visible when you select Yes for the Model junction capacitance parameter.

Fitting coefficient, FC, that quantifies the decrease of the depletion capacitance with applied voltage. The value must be greater than or equal to 0 and less than 0.95.

Dependencies

This parameter is only visible when you select Yes for the Model junction capacitance parameter.

Options for specifying initial conditions:

  • No — Do not specify an initial condition for the model.

  • Yes — Specify the initial transistor voltage.

    Note

    The SPICE PJFET block applies the initial transistor voltage across the junction capacitors and not across the ports.

Dependencies

This parameter is only visible when you select Yes for the Model junction capacitance parameter.

Selecting Yes for this parameter exposes the Initial condition voltage, ICVDS and Initial condition voltage, ICVGS parameters.

Drain-source voltage at the start of the simulation.

Dependencies

This parameter is only visible when you select Yes for the Model junction capacitance and Yes for the Specify initial condition parameter.

Gate-source voltage at the start of the simulation.

Dependencies

This parameter is only visible when you select Yes for the Model junction capacitance and Yes for the Specify initial condition parameter.

Temperature

Select one of these options for modeling the transistor temperature dependence:

  • Device temperature — Use the device temperature to model temperature dependence.

  • Fixed temperature — Use a temperature that is independent of the circuit temperature to model temperature dependence.

Fore more information, see Transistor Temperature.

Dependencies

Selecting Device temperature exposes the Offset local circuit temperature, TOFFSET parameter. Selecting Fixed temperature exposes the Fixed circuit temperature, TFIXED parameter.

Order of the exponential increase in the saturation current as temperature increases. The value must be greater than 0.

Transistor activation energy. The value must be greater than or equal to 0.1.

Transistor simulation temperature. The value must be greater than 0.

Dependencies

This parameter is only visible when you select Fixed temperature for the Model temperature dependence using parameter.

Temperature at which the transistor parameters are measured. The value must be greater than 0.

Amount by which the transistor temperature differs from the circuit temperature.

Dependencies

This parameter is only visible when you select Device temperature for the Model temperature dependence using parameter.

References

[1] G. Massobrio and P. Antognetti. Semiconductor Device Modeling with SPICE. 2nd Edition. New York: McGraw-Hill, 1993.

Extended Capabilities

C/C++ Code Generation
Generate C and C++ code using MATLAB® Coder™.

Introduced in R2008a