Documentation

Demux

Extract and output elements of virtual vector signal

  • Library:
  • Simulink / Commonly Used Blocks

    Simulink / Signal Routing

Description

The Demux block extracts the components of an input vector signal and outputs separate signals. The output signal ports are ordered from top to bottom. See Mux Signals for information about creating and decomposing vectors.

Ports

Input

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Output

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Output signals extracted from the input vector. The output signal ports are ordered from top to bottom. See Port Location After Rotating or Flipping for a description of the port order for various block orientations.

Parameters

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Specify the number and, optionally, the dimensionality of each output port. If you do not specify the dimensionality of the outputs, the block determines the dimensionality of the outputs.

The value can be a scalar specifying the number of outputs or a vector whose elements specify the widths of the block output ports. The block determines the size of its outputs from the size of the input signal and the value of the Number of outputs parameter.

If you specify a scalar for the Number of outputs parameter and all of the output ports are connected, as you draw a new signal line close to output side of a Demux block, Simulink adds a port and updates the Number of outputs parameter.

For an input vector of width n, here is what the block outputs.

Parameter ValueBlock outputs...Examples and Comments

p = n

p scalar signals

If the input is a three-element vector and you specify three outputs, the block outputs three scalar signals.

p > n

Error

This value is not supported.

p < n

n mod p = 0

p vector signals each having n/p elements

If the input is a six-element vector and you specify three outputs, the block outputs three two-element vectors.

p < n

n mod p = m

m vector signals each having (n/p)+1 elements and p-m signals having n/p elements

If the input is a five-element vector and you specify three outputs, the block outputs two two-element vector signals and one scalar signal.

[p1 p2 ... pm]

p1+p2+...+pm=n

pi > 0

m vector signals having widths p1, p2, ... pm

If the input is a five-element vector and you specify [3, 2] as the output, the block outputs three of the input elements on one port and the other two elements on the other port.

An array that has one or more of m elements with a value of -1, which specifies that Simulink infers the size for the element.

For example, suppose that you have a four-element array with a total width of 14 and you specify the parameter to be [p1 p2 -1 p4].

The value for the third element (the -1 element) is 14 - (p1 + p2 + p4)

m vector signals

If pi is greater than zero, the corresponding output has width pi. If pi is -1, the width of the corresponding output is computed dynamically.

[p1 p2 ... pm]

p1+p2+...+pm!=n

pi = > 0

Error

This value is not supported

If you specify the number of outputs that is smaller than the number of input elements, the block distributes the elements as evenly as possible over the outputs. For example, this model, model distributes the seven input signals as evenly as possible.

You can use –1 in a vector expression to indicate that the block dynamically sizes the corresponding port. For example, the expression [-1, 3 -1] causes the block to output three signals where the second signal always has three elements. The sizes of the first and third signals depend on the size of the input signal.

If a vector expression comprises positive values and -1 values, the block assigns as many elements as needed to the ports with positive values. The block distributes the remaining elements as evenly as possible over the ports with -1 values. For example, suppose that the block input is seven elements wide and you specify the output as [-1, 3 -1]. In this model, the block outputs two elements on the first port, three elements on the second, and two elements on the third.

Programmatic Use

Block Parameter:Outputs
Type:scalar or vector
Values:character vector
Default:{'2'} or vector

By default, the block icon is a solid bar of the block foreground color. To display the icon as a box containing the block type name, select none.

Programmatic Use

Block Parameter:Display option
Type:character vector
Values:'bar' | 'none'
Default:'bar'

Block Characteristics

Data Types

double | single | Boolean | base integer | fixed point | enumerated

Multidimensional Signals

No

Variable-Size Signals

No

Extended Capabilities

HDL Code Generation
Generate Verilog and VHDL code for FPGA and ASIC designs using HDL Coder™.

Introduced before R2006a

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