Unit Delay Enabled

Delay signal one sample period, if external enable signal is on


Additional Math & Discrete / Additional Discrete


The Unit Delay Enabled block delays a signal by one sample period when the external enable signal E is on. While the enable is off, the block is disabled. It holds the current state at the same value and outputs that value. The enable signal is on when E is not 0, and off when E is 0.

You specify the block output for the first sampling period with the value of the Initial condition parameter.

You specify the time between samples with the Sample time parameter. A setting of -1 means that the block inherits the Sample time.

Data Type Support

The Unit Delay Enabled block accepts signals of the following data types:

  • Floating point

  • Built-in integer

  • Fixed point

  • Boolean

  • Enumerated

The output has the same data type as the input u. For enumerated signals, the Initial condition must be of the same enumerated type as the input u.

For more information, see Data Types Supported by Simulink in the Simulink® documentation.

Parameters and Dialog Box

Initial condition

Specify the initial output of the simulation.

Sample time

Specify the time interval between samples. To inherit the sample time, set this parameter to -1. See Specify Sample Time in the online documentation for more information.


Data Types

Double | Single | Boolean | Base Integer | Fixed-Point | Enumerated

Sample Time

Specified in the Sample time parameter

Direct Feedthrough


Multidimensional Signals


Variable-Size Signals


Zero-Crossing Detection


Code Generation


Introduced before R2006a

Was this topic helpful?