Delay signal one sample period, if external enable signal is on, with external initial condition
Additional Math & Discrete / Additional Discrete
The Unit Delay Enabled External IC block delays a signal by
one sample period when the enable signal
E is on.
While the enable is off, the block holds the current state at the
same value and outputs that value. The enable
E is not 0, and off when
The initial condition of this block is given by the signal
You specify the time between samples with the Sample
time parameter. A setting of
the block inherits the Sample time.
The Unit Delay Enabled External IC block accepts signals of the following data types:
The data types of the inputs
be the same. The output has the same data type as
For more information, see Data Types Supported by Simulink in the Simulink® documentation.
Specify the time interval between samples. To inherit the sample
time, set this parameter to
Specify Sample Time in
the online documentation for more information.
Double | Single | Boolean | Base Integer | Fixed-Point
Specified in the Sample time parameter
Yes, of the reset input port
No, of the enable input port
Yes, of the external
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