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Scheduling and Timing

Often, developers choose to run the code generated by Embedded Coder® in the context of a timer interrupt. Model blocks run in a periodical fashion clocked by the periodical interrupt whose period is tied to the base sample time of the model.

This execution scheduling model is not flexible enough for many systems, especially control and communication systems, which must respond to external events in real time. Such systems require the ability to handle various hardware interrupts in an asynchronous fashion.

Embedded Coder software lets you model and generate code for such systems by creating tasks driven by Hardware Interrupt blocks in addition to the tasks that are left to be handled in the context of the timer interrupt.

Timer-Based Interrupt Processing

For code that runs in the context of the timer interrupt, each iteration of the model solver is run after an interrupt has been posted and serviced by an interrupt service routine (ISR). The code generated for the C2000 processors uses CPU_timer0 by default.

The timer is configured so that the base rate sample time of the model corresponds to the interrupt rate. The timer period and prescaler are calculated and set up to produce the desired rate as follows:


The minimum achievable base rate sample time depends on the model complexity. The maximum value depends on the maximum timer period value (232-1) and the CPU clock speed .

If the blocks in the model inherit their sample time value, and a sample time is not explicitly defined, the default value is 0.2 s.

For more information about timer-based interrupt processing, see C28x-Scheduler Options.

High-Speed Peripheral Clock

The Event Managers and their general-purpose timers, which drive PWM waveform generation use the high-speed peripheral clock (HISCLK). By default, this clock is selected in Embedded Coder software. This clock is derived from the system clock (SYSCLKOUT):

HISCLK = [SYSCLKOUT / (high-speed peripheral prescaler)]

The high-speed peripheral prescaler is determined by the HSPCLK bits set in SysCtrl. The default value of HSPCLK is 1, which corresponds to a high-speed peripheral prescaler value of 2.

For example, on the F2812, the HISCLK rate becomes

HISCLK = 150 MHz / 2 = 75 MHz

External Interrupt Processing

For code that runs in the context of an external interrupt, the model uses the C28x Hardware Interrupt block. Configure the interrupt operation with Configuration Parameters > Hardware Implementation > Hardware board settings > Target hardware resources > External Interrupt. For more information, see Model Configuration Parameters for Texas Instruments C2000 Processors.

ADC Interrupt Based Scheduling

You can set ADC interrupt as the Simulink model base rate. This means that every periodic event in the model will occur at the rate decided by ADC interrupt.

In order to set the base rate, ADC interrupt must be triggered. In general, an ePWM module can be used to trigger an ADC interrupt. An ePWM is free running counter which can be configured to trigger Start of Conversion for ADC module at a periodic interval. The ADC module can trigger an interrupt at the end of its conversion.

Other sources for ADC Start of Conversion include external interrupt and software.

In any model with base rate trigger:

  • Any task in the model should not have base rate less than the base rate trigger.

  • The sample time of ADC block should match with the base rate of the model.

For more information about ADC Interrupt based scheduling, see C28x-Scheduler Options and Field-Oriented Control of PMSM with Quadrature Encoder Using C2000 Processors.