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Create bitstream containing user programming and download it to Xilinx^® FPGA and SoC devices

The Deep Learning HDL Toolbox™ Support Package for Xilinx FPGA and SoC Devices enables you to deploy your custom series deep learning network , and custom deep learning processor IP on the hardware.

Topics

Prototype Deep Learning Networks on FPGA and SoCs Workflow

Accelerate the prototyping, deployment, design verification, and iteration of your custom deep learning network running on a fixed bitstream by using the dlhdl.Workflow object .

Bitstream Resource Utilization

Estimate resource utilization for shipping bitstreams.

Featured Examples

Get Started with Deep Learning FPGA Deployment on Xilinx ZC706 SoC

Create, compile, and deploy a dlhdl.Workflow object that has a handwritten character detection series network as the network object using the Deep Learning HDL Toolbox™ Support Package for Xilinx FPGA and SoC. Use MATLAB® to retrieve the prediction results from the target device.

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Deep Learning HDL Toolbox Support Package for Xilinx FPGA and SoC Devices Documentation

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