These examples show how to implement 5G NR HDL cell search and MIB recovery on Xilinx-based platforms with hardware-software co-design and hardware support packages.
The workflow for designing and deploying a 5G NR cell search and MIB recovery algorithm to hardware is shown.
There are two examples which demonstrate the final step in the workflow.
5G NR MIB Recovery Using Analog Devices AD9361/AD9364 (Communications Toolbox Support Package for Xilinx Zynq-Based Radio)
5G NR MIB Recovery Using Xilinx RFSoC Device (SoC Blockset Support Package for Xilinx Devices)
Both examples use hardware-software co-design modeling techniques to implement the cell search and MIB recovery algorithm shown in the diagram. They reuse the Simulink models presented in the NR HDL Cell Search and NR HDL MIB Recovery examples to generate HDL for the FPGA logic. They then add all of the software modeling and interfacing required to implement the algorithm in real-time on hardware.
For a more detailed description of the algorithm see the NR HDL Cell Search and MIB Recovery MATLAB Reference example. For a general description of how MATLAB and Simulink can be used together to develop deployable models, see Wireless Communications Design for FPGAs and ASICs.