Could you please advise on how I can use the EPWM OFF status output from CMPSSL, since the LTH signal cannot latch and retain the trip status fast enough?

Only CMPSSL has this issue. It cannot use the LHT value because the fault status is not latched or retained.

For CMPSS operation, the LHT latch output can be used normally.

Is it possible to use one of the ePWM3 registers to indicate or monitor the trip status?

[Torsten]

Answer from AI:

To handle high-speed fault conditions where the raw comparator output pulses too quickly for a direct combinatorial signal, route the CMPSS low-limit (CMPSSL) asynchronous/filtered output directly into the ePWM Digital Compare (DC) submodule and use the Trip-Zone (TZ) One-Shot (OST) latch instead of relying on external soft logic. [1, 2]

Configuration Steps in MATLAB/Simulink (C2000 Blockset)

• Open the CMPSS Block: Configure your CMPSS block and ensure the digital filter or high/low comparator output path for CMPSSL is mapped correctly. [1]
• Route via EPWM XBAR: Use the Output/Trip Crossbar settings to route the CMPSSL event to a designated digital compare trip input (e.g., DCAH or DCAL). [1]
• Configure the ePWM Block:
• Double-click your ePWM Type 1-4 block.
• Navigate to the Digital Compare tab and configure DCAEVT1 (Digital Compare A Event 1) to be generated by your selected input path.
• Navigate to the Trip-Zone tab and enable One-Shot (OST) trip action for DCAEVT1. Set the action on EPWMxA and EPWMxB to force low/high/high-impedance as required by your power stage safety specifications. [1, 2, 3, 4, 5, 6, 7]
• Latch and Retain: The hardware Digital Compare event will inherently latch and retain the trip state inside the ePWM's own TZ submodule at full system-clock speed, bypassing any limitation of slow software or unlatched LTH signals. [1]
• Clear the Latch via Software: After the fault condition clears, use a Register Read/Write block or explicit driver call to clear the one-shot trip flag via EPwm1Regs.TZCLR.bit.OST = 1. [1, 2]