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Can I get a delay equivalent to a fraction of a time step?

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William Diaz
William Diaz on 15 Oct 2019
Commented: William Diaz on 25 Oct 2019
Hello everyone,
I want to add a delay (a fraction of a step time, I mean 0,054 ms) in a communication system simulation between a transmitter and a receiver. Transmitter is an integer (vector) to bit converter that receives a vector of ones and zeros (122 bits), like this:
Vector = [1 1 1 0 0 0 0 0 1 1 0 0 0 0 1 1 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 1 0 0 0 0 0 1 0 0 1 1 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 1 0 1 0 0 0 0 0 1 1 1 0 0 0 0 0 1 0 1 1 1 0 0 0 1 1 1 0 0 0 0 0 1 0 1 0 1 1 0 1 1 1 1 1 1 1 1]
(This is a CAN Protocol data frame, inlcuding stuffing bits)
OKIntegerToBitConverterOK_NoDelay.png
That I get after Integer to Bit Converter:
TramaCAN.png
That I get at two channels of scope block (with 4 time step - but I need a fraction of a time step):
TramaCANPlusDelay.png
Thanks in advance.
William

  13 Comments

William Diaz
William Diaz on 22 Oct 2019
No, I'm not using HDL.
But, could I use this block to serialize the 122x1 vector and apply:
  • Delay (this gives a 8-bits vector, the LSB has the secuence of the serialized data)
  • After the delay block, I want to count the number of bits after the firts zero bit (start of frame) in order to confirm the dataframe is correct (Can I do this using a function with the specific code?).
This is the simulation system (without the specific counter block):
Using_HDL_Library.png
And this is the Logic Analizer and the Scope plots (respectively):
Note: There is a 1 second delay.
PLOT_ Using_HDL_Library.png
PLOT_SCOPE_ Using_HDL_Library.png
Walter Roberson
Walter Roberson on 23 Oct 2019
I do not think you can use Serializer 1D except when you are targetting FPGA / HDL.

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