Does HDL Coder support the VHDL fixed-point and floating-point packages?

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Does the VHDL code generated by HDL Coder use the IEEE VHDL fixed-point or floating-point packages (IEEE.fixed_pkg.all, IEEE.float_pkg.all)?

Accepted Answer

MathWorks HDL Coder Team
MathWorks HDL Coder Team on 23 Nov 2020
No. To ensure full portability and numerical consistency with MATLAB rounding and saturation, HDL Coder generates this functionality using the IEEE std_logic_1164 and numeric_std packages. Since operations with different fixed-point data types are properly handled within MATLAB and Simulink, and the generated HDL matches the original MATLAB/Simulink model, there’s no real need to use fixed-point packages in the VHDL.
To help with readability, HDL Coder generates comments with the corresponding MATLAB types, for example:
SIGNAL data_in_signed : signed(17 DOWNTO 0); -- sfix18_En11
SIGNAL Constant_out1 : signed(17 DOWNTO 0); -- sfix18_En11
SIGNAL Tapped_Delay_out1 : vector_of_signed18(0 TO 10); -- sfix18_En11 [11]
SIGNAL Tapped_Delay_out1_1 : vector_of_std_logic_vector18(0 TO 10); -- ufix18 [11]
SIGNAL MidSample : std_logic_vector(17 DOWNTO 0); -- ufix18

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