The block implements a variable time-delay, or variable sample delay in discrete systems using fixed-step solver.
The output is interpolated, in order to approximate sub-sampletime delay. Therefore the input signal should be differentiable and should be able to obtain a wide range of numeric values (float, int, but not like bool).
Attila (2021). Variable time delay for fixed-step discrete real value signals (https://www.mathworks.com/matlabcentral/fileexchange/44300-variable-time-delay-for-fixed-step-discrete-real-value-signals), MATLAB Central File Exchange. Retrieved .
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