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HDL Verifier Support Package for Microsemi FPGA Boards

Debug and test HDL code on Microsemi FPGAs using FPGA-in-the-loop


Updated 22 Sep 2021

HDL Verifier™ Support Package for Microsemi® FPGA Boards contains the board definition files for FPGA-in-the-loop (FIL) simulation with HDL Verifier on supported Microsemi FPGA and SoC FPGA boards. With FIL simulation, use MATLAB® or Simulink® to test designs in real hardware for any existing HDL code. The HDL code can either be manually written or generated from a model subsystem using HDL Coder.
Supported boards include the Microsemi PolarFire™ Evaluation Kit and the Microsemi SmartFusion®2 Advanced Development Kit.
This support package is functional for R2018a or higher.

MATLAB Release Compatibility
Created with R2018a
Compatible with R2018a to R2021b
Platform Compatibility
Windows macOS Linux

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