HDL Verifier Support Package for Microchip

Debug and test HDL code on Microchip FPGAs using FPGA-in-the-loop
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Updated 20 Mar 2024
HDL Verifier™ Support Package for Microchip FPGA Boards contains the board definition files for FPGA-in-the-loop (FIL) simulation with HDL Verifier on supported Microchip FPGA and SoC FPGA boards. With FIL simulation, use MATLAB® or Simulink® to test designs in real hardware for any existing HDL code. The HDL code can either be manually written or generated from a model subsystem using HDL Coder.
Supported boards include the
  • PolarFire™ Evaluation Kit
  • SmartFusion®2 Advanced Development Kit (M2S150-ADV-DEV-KIT)
  • RTG4 Development Board (RTG4-DEV-KIT)
This support package is functional for R2018a or higher.
MATLAB Release Compatibility
Created with R2018a
Compatible with R2018a to R2024a
Platform Compatibility
Windows macOS (Apple silicon) macOS (Intel) Linux
Categories
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