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updated 7 months ago

PLL Frequency Synthesis Examples by Dick Benson

Dick Benson (view profile)

An Assortment of Simulink PLL Models (phase locked loop, delay lock loop, pll)




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updated 12 months ago

Launchpad msp_exp430g2553 Target by Yuriy

Yuriy (view profile)

Target for launchpad (embedded coder required) with msp430g2553 (launchpad, msp430g2, target)



mymsp430_make_rtw_hook(hookMethod, modelName, rtwRoot, te...

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updated almost 2 years ago

FPGA Implementation Of the Sobel Color Edge detector using HDL Coder by SUMEET

SUMEET (view profile)

To overcome the limitation of gray scale Sobel edge detector i have implemented the Sobel color edge (sobel color edge dete...)

sobelcolor(x_in, y_in, data_in1, data_in2, data_in3)


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updated 2 years ago

HDL Verifier Support Package for Altera FPGA Boards by MathWorks HDLVerifier Team

Use HDL Verifier for FPGA-in-the-loop support for FPGA-based verification on Altera FPGA boards (aerospace, automotive, communications)

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updated 2 years ago

HDL Verifier Support Package for Xilinx FPGA Boards by MathWorks HDLVerifier Team

HDL Verifier Support Package installer file that works with Support package installer (aerospace, communications, control design)

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updated 3 years ago

SCOPE: interactively tabulate SEER excel variables by Rex Cheung

This takes SEER excel column data interactively, tabulate them, write back in table format. (data import, data export, optimization)


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updated 4 years ago

short time fourier transform by Yella

Yella (view profile)

I have written the basic code of STFT. (short time fourier tr..., communications, signal processing)


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updated 5 years ago

Compare with hand coding and auto code generation of HDL by Akemi

Akemi (view profile)

You can confirm difference betwwen hand writing code and auto generation code. (aerospace, automotive, communications)




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