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Kiran Kintali


MathWorks

87 total contributions since 2011

Professional Interests: Signal Processing, FPGAs and ESL Design

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Kiran Kintali's Badges

  • 6 Month Streak
  • Revival Level 2
  • Knowledgeable Level 2
  • First Answer

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Answered
availability of hdl coder
Thank you for your feedback. We will review this suggestion internally.

1 day ago | 0

Answered
Error encountered during HDL Code Generation
Can you please contact tech support with reproduction steps? The reproduction steps help diagnose the problem. We can take a loo...

4 days ago | 0

Answered
matlab code to hdl code
This looks like an installation issue unrelated to HDLCoder. Can you please contact tech support? Thanks

4 days ago | 0

Answered
Native Floating Point Integrator Problem
Yes. You can use the DTI block with HDL code generation. We will remove this incorrect check in the HDL model checker. Thanks

8 days ago | 0

| accepted

Answered
Native Floating Point Integrator Problem
Thank you for reporting this issue. This is a bug in HDL model checker that is incorrectly reporting the DTI block as unsupporte...

8 days ago | 0

Answered
HDL work flow advisor OK ... Until HDL Code generation fails
This is a bug in HDLCoder. please reach out to technical support with reproduction steps along with your model. We will investig...

10 days ago | 0

| accepted

Answered
Error Found unsupported dynamic matrix type at input port: 0, name 'X', in the file/function autom_fixpt.
The message is showing that HDL code generation cannot support dynamic matrices. Inputs to MATLAB design function have to be ...

18 days ago | 0

Answered
HDL Coder Ground Problem
I have replaced your ground blocks with constants (of zero value) and sample time set as -1. This eliminates the inf rates in yo...

22 days ago | 1

| accepted

Answered
HDL Coder Ground Problem
Please note sample of Inf is not supported for optimizations. You need to have explicit sample time set on the constant blocks o...

22 days ago | 1

Answered
is it possible to simulate an FPGA in simulink?
You can use Simulink blocks to model and simulate your algorithm and use HDLCoder to generate VHDL/Verilog from the model. You c...

26 days ago | 0

Answered
Generating Verilog for Butterworth IIR lowpass filter, incorrect simulation
thank you for bringing this to our attention. please report the issue to technical support with reproduction steps for further i...

3 months ago | 0

Answered
Where can I set output and input port of an HDL-supported Simulink model?
Are you looking for how to simulate the generated code? If yes, please try to generate HDL test bench and look at how these cloc...

3 months ago | 0

Answered
Simulink Engine Interface is not enabled
You seem to have hit an internal error. Can you please create a tech support case for HDLCoder? Someone can help you if you prov...

3 months ago | 0

Answered
Using Reference Model for HDL code Generation
Yes, you can use model reference block with HDLCoder to generate HDL code without creating duplicate copies.

3 months ago | 1

| accepted

Answered
if-else equivalent block for hdl code generation
MATLAB Function block does not yet support Native Floating Point. This is a future enhancement under consideration. <https://...

4 months ago | 2

| accepted

Answered
Can HDL coder be used for deep learning prototyping on FPGA ?
Please contact wang.chen@mathworks.com for details.

5 months ago | 0

Answered
I am trying to implement matlab code in hdl using hdl coder.But iam getting errors like variable not initialized during fixed point conversion.How to resolve .Pls help
please follow the steps in this getting started tutorial https://www.mathworks.com/help/hdlcoder/examples/getting-started-wit...

5 months ago | 0

Answered
Is it possible to control the data type of GENERIC parameters in VHDL generated by HDL Coder?
>> web(fullfile(docroot, 'hdlcoder/ref/maskparameterasgeneric.html')) Please check this page. You can use mask parameters i...

5 months ago | 0

Answered
how can I get the fixed point number as "-981.0621" from hdlcoder?
can you share design.m, testbench.m and matlab hdlcoder project file for this question? thanks

6 months ago | 0

Answered
how to get correct FFT HDL Optimized ?
web(fullfile(docroot, 'dsp/examples/generate-hdl-code-for-fft-hdl-optimized-block.html')) Please check above example for prop...

6 months ago | 0

Answered
HDL code Generation creation failed.
hi danny, This is not reproducible on our end. can you tell us the release you are using and what step in the tutorial you se...

6 months ago | 0

Answered
SIMULINK HDL coder error
Hi Yu, You need to break the code into a testbench M file (script) and design M file (function); the testbench calls the desi...

6 months ago | 0

| accepted

Answered
Issue to begin TestBench generation.
What version of MATLAB are you using? I was not able to reproduce the issue. Please see the attached message.

6 months ago | 0

| accepted

Answered
Triggering video stream with AND gate.
Control based subsystems (enable, triggered, resettable subsystems) are not supported at DUT level. Please consider creating one...

7 months ago | 0

Answered
This error shows up when I try to convert simulink to HDL
please create a tech support request with models and reproduction steps. it looks like there is use of unsupported floating-poin...

7 months ago | 0

Answered
error with fixed point conversion
please provide an example project with reproduction steps.

7 months ago | 0

Answered
This error shows up when I try to convert simulink to HDL
The example seems to be using unsupported 'mod' function for HDL code generation in MATLAB function block. 'mod' operation in Ma...

7 months ago | 0

Answered
Simulink real time instead of HDL coder for FPGA-in-loop simulation for simscape
we would like to know more requirements on your use case. please reach out to MathWorks technical support with your requirem...

9 months ago | 0

Answered
error input uint8 simulink
can you please share your matlab code or simulink model?

10 months ago | 0

Answered
How do you pad zeros to a discrete element-based input?
you may want to try using bitconcat function supported by HDLCoder. z = fi(0, 0,7,0); % create 7-bit zero word y = bitconc...

11 months ago | 0

| accepted

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