HDL Coder™ generates portable, synthesizable Verilog® and VHDL® code from MATLAB® functions, Simulink® models, and Stateflow® charts. The generated HDL code can be used for FPGA programming or ASIC prototyping and design.
HDL Coder provides a workflow advisor that automates the programming of Xilinx® and Altera® FPGAs. You can control HDL architecture and implementation, highlight critical paths, and generate hardware resource utilization estimates. HDL Coder provides traceability between your Simulink model and the generated Verilog and VHDL code, enabling code verification for high-integrity applications adhering to DO-254 and other standards.
Discover more about HDL Coder by exploring these resources.
Explore documentation for HDL Coder functions and features, including release notes and examples.
Browse the list of available HDL Coder functions.
View system requirements for the latest release of HDL Coder.
View articles that demonstrate technical advantages of using HDL Coder.
Read how HDL Coder is accelerating research and development in your industry.
Find answers to questions and explore troubleshooting resources.
Connect HDL Coder to hardware platforms.
HDL Coder apps enable you to quickly access common tasks through an interactive interface.
Use HDL Coder to solve scientific and engineering challenges: