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Simulink PLC Coder

INOUT Variable Support

INOUT Variable Support

Generate INOUT variables for MATLAB Function and Truth Table blocks that use the same name for input and output data

Alias Data Type Support

Alias Data Type Support

Optionally preserve alias names for data types in generated code to help integration with target-specific data types

Simulink Requirements Links

Simulink Requirements Links

Embed requirements links as comments in generated code

Simulink Design Verifier Integration

Simulink Design Verifier Integration

Generate code with multiple test benches from test harness models created with Simulink Design Verifier

64-bit Windows 7 Support for Siemens STEP 7 and RSLogix 5000 IDEs

64-bit Windows 7 Support for Siemens STEP 7 and RSLogix 5000 IDEs

Generate, import, and verify code for these IDEs

Absolute Time Temporal Logic by Using IEC 61131 Timer

Absolute Time Temporal Logic by Using IEC 61131 Timer

Generate code for this Stateflow construct

Mixed C/C++ Code

Global Variables for Siemens IDEs

Generate code for global data store memory using Simulink.Signal objects for Siemens STEP 7 and TIA Portal IDEs

Latest Releases

R2016a (Version 2.1) - 3 Mar 2016

Version 2.1, part of Release 2016a, includes the following enhancements:

  • INOUT Variable Support: Generate INOUT variables for MATLAB Function and Truth Table blocks that use the same name for input and output data
  • Alias Data Type Support: Optionally preserve alias names for data types in generated code to help integration with target-specific data types
  • Simulink Requirements Links: Embed requirements links as comments in generated code
  • Simulink Design Verifier Integration: Generate code with multiple test benches from test harness models created with Simulink Design Verifier
  • 64-bit Windows 7 Support for Siemens STEP 7 and RSLogix 5000 IDEs: Generate, import, and verify code for these IDEs

See the Release Notes for details.

R2015b (Version 2.0) - 3 Sep 2015

Version 2.0, part of Release 2015b, includes the following enhancements:

  • SIEMENS TIA Portal V12 and V13 IDE Support: Generate code for these IDEs
  • Streamlined Target IDE Selection: Choose target IDE more quickly
  • Absolute Time Temporal Logic by Using IEC 61131 Timer: Generate code for this Stateflow construct
  • Global Variables for Siemens IDEs: Generate code for global data store memory using Simulink.Signal objects for Siemens STEP 7 and TIA Portal IDEs
  • Additional Math Function Support: Generate code for hyperbolic functions
  • Code Optimizations: Generate more efficient code for type casts’
  • Linked Subsystems Code Verification: Verify that generated code results match simulation results

See the Release Notes for details.

R2015a (Version 1.9) - 5 Mar 2015

See highlights and screen shots.

Version 1.9, part of Release 2015a, includes the following enhancements:

  • Code generation for 3S-Smart Software Solutions CoDeSys V3.5 IDE
  • Generation of code that preserves variable names in MATLAB Function blocks

See the Release Notes for details.

R2014b (Version 1.8) - 2 Oct 2014

See highlights and screen shots.

Version 1.8, part of Release 2014b, includes the following enhancements:

  • Code generation for Rexroth IndraWorks version 13V12 IDE
  • Code generation for OMRON Sysmac Studio v1.09 IDE
  • Code generation support for exported functions in Stateflow
  • Code generation support for global data store memory using Simulink.Signal object
  • Variable names preserved for function block inputs and outputs

See the Release Notes for details.

R2014a (Version 1.7) - 6 Mar 2014

See highlights and screen shots.

Version 1.7, part of Release 2014a, includes the following enhancements:

  • Static code metrics report
  • Code generation for Siemens STEP 7 V5.5 IDE, B&R Automation Studio 4 IDE, and Beckhoff TwinCAT 3 IDE
  • Model block description in generated code for CoDeSys 2.3 IDE
  • Simulink.Parameter description in generated code for Codesys 2.3 IDE

See the Release Notes for details.