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Speed and Area Optimization

Improvements through resource sharing, streaming, pipelining, RAM mapping

For your target hardware, generate HDL code from a MATLAB® function that meets timing and area requirements by using speed and area optimizations. Area optimizations reduce resource usage of your design. Speed optimizations improve the timing of your design on the target FPGA so that your design runs at higher frequencies by optimizing the critical path. To learn more about each type of optimization in HDL Coder™, see Speed and Area Optimizations in HDL Coder.


coder.hdl.loopspecUnroll or stream loops in generated HDL and High-Level Synthesis (HLS) code
coder.hdl.pipelineInsert pipeline registers at output of MATLAB expression
coder.hdl.ramconfigSpecify RAM mapping configuration for persistent array variables (Since R2023b)
hdl.npufunApply neighborhood processing and element-wise operations to incoming image or matrix for frame-to-sample conversion (Since R2022b)
hdl.iteratorfunApply iterative operation to an incoming image or matrix for frame-to-sample conversion (Since R2022b)


Optimization Basics

Area Optimization

Speed Optimization

I/O Optimization