J-K Flip-Flop

Model a negative-edge-triggered J-K flip-flop

Libraries:
Simulink Extras / Flip Flops

Description

The J-K Flip-Flop block models a negative-edge-triggered J-K flip-flop. The J-K flip-flop block has three inputs, J, K, and CLK. On the negative (falling) edge of the clock signal (CLK), the J-K Flip-Flop block outputs Q and its complement, !Q, according to the following truth table. In this truth table, Q_n-1 is the output at the previous time step.

Note

The J-K Flip-Flop block treats a nonzero input as true (1).

J	K	Q _n	!Q _n
0	0	Q _n-1	!Q _n-1
0	1	0	1
1	0	1	0
1	1	!Q _n-1	Q _n-1

When J is 1 and K is 0, the flip-flop goes to the set state (Q_n is 1). When J is 0 and K is 1, the flip-flop goes to the reset state (Q_n is 0). When both J and K are 0, the flip-flop stays in the previous state (Q_n is Q_n-1). When both J and K are 1, the flip-flop toggles (Q_n is the complement of Q_n-1).

Logic Signals as Boolean or Double Data Types

The Implement logic signals as boolean data (vs. double) configuration parameter setting affects the input and output data types of the J-K Flip-Flop block because this block is a masked subsystem that uses the Combinatorial Logic block. For more information about this configuration parameter, see Implement logic signals as Boolean data (vs. double).

Ports

Input

expand all

J — Input signal J
scalar

Input signal J specified as a scalar, vector, or matrix.

Dependencies

The data types that the J-K Flip-Flop block accepts depend on the setting of the Implement logic signals as boolean data (vs. double) configuration parameter:

On — J-K Flip-Flop block accepts only real scalar signals of type boolean.
Off — J-K Flip-Flop block accepts real scalar signals of type boolean or double (both inputs must have the same type).