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Analyze AUTOSAR Component Models

Simulink® Design Verifier™ supports design error detection, test generation, and property proving analysis for AUTOSAR software components (SWC) at the unit level. You can analyze an AUTOSAR component that contains blocks from the AUTOSAR Blockset Basic Software block library, which model component calls to AUTOSAR Basic Software (BSW) services, including:

  • Diagnostic Event Manager (Dem)

  • Function Inhibition Manager (FiM)

  • NVRAM Manager (NvM)

Additionally, you can analyze a Simulink model generated by importing descriptions of AUTOSAR software components from AUTOSAR XML (ARXML) files. See, Create and Configure AUTOSAR Software Component (AUTOSAR Blockset).

The software creates an analysis harness that provides stub implementations of the Basic Software service operations called by the component, and then performs the analysis on the harness model. By default, the software saves the harness model in <current_folder>\sldv_output\<model_name>\<model_name>_SldvStub.slx.

AUTOSAR Model at Component Level

block diagram with inlined image of a subsystem's contents


The Simulink Design Verifier analysis reports an incompatibility if:

  • You use Simulink Design Verifier to generate tests in the Simulink Test™, and the harness parameter is set to Signal Editor.

  • The component model contains service component blocks, such as the Diagnostic Service Component or NVRAM Service Component blocks.

  • The component model contains Initialize Function, Reinitialize Function, Reset Function, or Terminate Function blocks that call a Simulink functions that is not defined in the same component.

  • If you perform Software-in-the-Loop (SIL) code analysis on an AUTOSAR component model

  • You export test cases generated by Simulink Design Verifier and run software-in-the-loop (SIL) simulation on those test cases in Simulink Test Manager. The recommended approach is to perform back-to-back testing using Simulink Test.

See Also

(AUTOSAR Blockset) | (Simulink Test)

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