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Simulink Design Verifier Options

Simulink® Design Verifier™ provides a comprehensive set of options to control and customize the verification and validation process of Simulink models. The options cover a broad spectrum of functionalities, including but not limited to, selecting the type of analysis by defining the search depth for errors, setting time and resource limits, and customizing test case generation for achieving different coverage metrics.

Options in Configuration Parameters Dialog Box

You can set options for Simulink Design Verifier analysis in the Configuration Parameters dialog box. To view the options, open Design Verifier tab. In the Prepare section, from the drop-down list and click Settings to open the Design Verifier pane of the model configuration parameters.

By default, options for Simulink Design Verifier do not appear in the Configuration Parameters dialog box. When you open the Design Verifier tab, Simulink Design Verifier associates its default options with the model. After you save the model, you can access options for Simulink Design Verifier directly from the Configuration Parameters dialog box.

See Set Model Configuration Parameters for a Model for more information about working with this interface.

Design Verification Options Objects

You can use the sldvoptions function to specify Simulink Design Verifier options at the command line.

To view the options associated with a Simulink model, type this syntax in the MATLAB® command window:

opts = sldvoptions('model_name');

Command-Line Parameters for Design Verification Options

Use the following parameters to configure the behavior of Simulink Design Verifier. Use the get_param and set_param functions to retrieve and specify values for these parameters programmatically.

This table groups parameters based on a specific workflow and location in the Simulink Design Verifier options dialog box.


UI Label

Commandline Parameter


Design VerifierAnalysis options



{'TestGeneration'} | 'DesignErrorDetection' | 'PropertyProving'

Maximum analysis time (s)


double {300}


Output folder


character array {'sldv_output/$ModelName$'}

Make output file names unique by adding a suffixDVMakeOutputFilesUnique{'on'} | 'off'
Rebuild model representationRebuild model representationDVRebuildModelRepresentation'Always' | {'If change is detected'}
Automatic stubbing of unsupported blocks and functionsDVAutomaticStubbing{'on'} | 'off'
Use specified input minimum and maximum valuesDVDesignMinMaxConstraints{'on'} | 'off'
Run additional analysis to reduce instances of rational approximationDVReduceRationalApprox{'on'} | 'off'
Validate test cases or counterexamples with parallel computingDVUseParallel'on' | {'off'}
Exclude and justify objectivesIgnore objectives based on filterDVCovFilter'on' | {'off'}
Filter file(s)DVCovFilterFileName

character array {''}

Filter ExplorerDVCovFilterFileName 
Code analysis optionsSupport S-Functions in the analysisDVSFcnSupport{'on'} | off'
Ignore the volatile qualifierDVCodeAnalysisIgnoreVolatile{'on'} | off'
Additional options for code analysisDVCodeAnalysisExtraOptionscharacter array {''}
Block ReplacementsBlock ReplacementsApply block replacementsDVBlockReplacement

'on' | {'off'}

List of block replacement rulesDVBlockReplacementRulesListcharacter array {'<FactoryDefaultRules>'}
Output modelFile path of the output modelDVBlockReplacementModelFileNamecharacter array {'$ModelName$_replacement'}
Parameters and VariantsParameters

Parameter configuration

Parameter specification > Parameter tableDVParameterNamesdouble array {[]}
DVParameterConstraintsdouble array {[]}
DVParameterUseInAnalysiscell array {[]}
Parameter specification > Parameter table > Parameter configuration fileDVParametersConfigFileNamecharacter array {'sldv_params_template.m'}
VariantsAnalyze all Startup VariantsDVAnalyzeAllStartupVariants 
Test GenerationTest GenerationTest generation targetDVTestgenTarget{'Model'} | 'GenCodeTopModel' | 'GenCodeModelRef'
Model coverage objectivesDVModelCoverageObjectives'None' | 'Decision' | {'ConditionDecision'} | 'MCDC' | 'EnhancedMCDC'
Test conditionsDVTestConditions'EnableAll' | 'DisableAll' | {'UseLocalSettings'}
Test objectivesDVTestObjectives'EnableAll' | 'DisableAll' | {'UseLocalSettings'}
Maximum test case stepsDVMaxTestCaseStepsint32 {10000}
Test suite optimizationDVTestSuiteOptimization{'Auto'} | 'IndividualObjectives' | 'LongTestcases' | 'LargeModel (Nonlinear Extended)'
Relational Boundary ObjectivesInclude relational boundaryDVIncludeRelationalBoundary{'on'} | 'off'
Floating point absolute toleranceDVAbsoluteTolerancedouble {'1.0e-05'}
Floating point relative toleranceDVRelativeTolerancedouble {'0.01'}
Enhanced MCDCUse strict propagation conditionsDVStrictEnhancedMCDC'on' | {'off'}
Add tests for the missing coverageExtend using existing coverage dataDVIgnoreCovSatisfied'on' | {'off'}
Coverage dataDVCoverageDataFilecharacter array {''}
Extend using existing test dataDVExtendExistingTests'on' | {'off'}
Test dataDVExistingTestFilecharacter array {''}
Separate objectives satisfied with the existing tests/coverage data in the reportDVIgnoreExistTestSatisfied{on'}| 'off'
Design Error DetectionModeling ErrorsDead logic (partial)DVDetectDeadLogic'on' | {'off'}
Run exhaustive analysisDVDetectActiveLogic'on' | {'off'}
Coverage objectives to be analyzedDVDeadLogicObjectives'Decision' | {'ConditionDecision'} | 'MCDC'
Out of bound array accessDVDetectOutOfBounds{'on'} | 'off'
Data store access violationsDVDetectDSMAccessViolations'on' | {'off'}
Numerical ErrorsDivision by zeroDVDetectDivisionByZero{'on'} | 'off'
Integer overflowDVDetectIntegerOverflow{'on'} | 'off'
Non-finite and NaN floating-point valuesDVDetectInfNaN'on' | {'off'}
Subnormal floating-point valuesDVDetectSubnormal'on' | {'off'}
Signal Range ErrorsSpecified minimum and maximum value violationsDVDesignMinMaxCheck'on' | {'off'}
Specified block input range violationsDVDetectBlockInputRangeViolations'on' | {'off'}
High-Integrity Systems Modeling ChecksUsage of remainder and reciprocal operations - hisl_0002DVDetectHISMViolationsHisl_0002 
Usage of square root operations - hisl_0003DVDetectHISMViolationsHisl_0003 
Usage of log and log10 operations - hisl_0004DVDetectHISMViolationsHisl_0004 
Usage of Reciprocal Square Root blocks - hisl_0028DVDetectHISMViolationsHisl_0028 
Property ProvingProperty ProvingAssertion blocksDVAssertions'EnableAll' | 'DisableAll' | {'UseLocalSettings'}
Proof assumptionsDVProofAssumptions'EnableAll' | 'DisableAll' | {'UseLocalSettings'}
StrategyDVProvingStrategy'FindViolation' | {'Prove'} | 'ProveWithViolationDetection'
Maximum violation stepsDVMaxViolationStepsint32 {'20'}
ResultsData file optionsData file nameDVDataFileNamecharacter array {'$ModelName$_sldvdata'}
Include expected output valuesDVSaveExpectedOutput'on' | {'off'}
Randomize data that do not affect the outcomeDVRandomizeNoEffectData'on' | {'off'}
Harness model optionsGenerate separate harness model after analysisDVSaveHarnessModel'on' | {'off'}
Harness model file nameDVHarnessModelFileNamecharacter array {'$ModelName$_harness'}
Reference input model in generated harnessDVModelReferenceHarness'on' | {'off'}
Harness sourceDVHarnessSource{'Signal Builder'} | 'Signal Editor'
Simulink Test optionsTest File nameDVSlTestFileNamecharacter array {'$ModelName$_test'}
Test Harness nameDVSlTestHarnessNamecharacter array {'$ModelName$_sldvharness'}
ReportReportGenerate report of the resultsDVSaveReport'on' | {off'}
Generate additional report in PDF formatDVReportPDFFormat'on' | {off'}
Report file nameDVReportFileNamecharacter array {'$ModelName$_report'}
Include screen shots of propertiesDVReportIncludeGraphics'on' | {off'}
Display reportDVDisplayReport{'on'} | 'off'

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