Does Simulink Design Verifier consider calibration and NVM variable ranges?

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Yann Serim
Yann Serim on 4 Jul 2017
Edited: Yann Serim on 4 Jul 2017
The model I am trying to verify with Simulink Desgin Verifier (SLDV) module has calibration values (constant blocks with values from the workspace e.g. MyVariable_pct_C) and Data Store Read blocks that also refer to similar constant values from the workspace. Do the SLDV functions (Test Case Generation, Design Error Detection, Code Coverage...) consider the range of the calibration and Data Store Read variables and vary them in order to achieve the target goal (e.g. code coverage, design flaws..)?

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