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This is the implementation of single-cycle MIPS processor in Simulink. It closely follows the MIPS microarchitecture described in "Digital Design and Computer Architecture" by David Money Harris and Sarah L. Harris. This design can be simulated in Simulink and converted automatically to HDL using HDL Coder.
Supported instructions:
add
sub
and
or
slt
addi
lw
sw
beq
j
The instruction memory is preloaded with a sample program from the same book.
Mikhail (2021). MIPS processor in Simulink (https://github.com/kyak/slmips), GitHub. Retrieved .
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@timo Thanks, i didn't realize this model uses datatypes that require Fixed-Point Designer. I could try and work around that, but after reading your comment i decided to go ahead and add additional dependency by reimplementing some parts of the model using Stateflow.
Good luck!