Memory - Output input from previous time step

Library

Discrete

Description

The Memory block outputs its input from the previous time step, applying a one integration step sample-and-hold to its input signal.

This sample model demonstrates how to display the step size used in a simulation. The Sum block subtracts the time at the previous step, generated by the Memory block, from the current time, generated by the clock.

Data Type Support

The Memory block accepts real or complex signals of any data type supported by Simulink® software, including fixed-point data types.

For a discussion on the data types supported by Simulink software, see Data Types Supported by Simulink® in the Simulink documentation.

Parameters and Dialog Box

Initial condition

The output at the initial integration step. This must be set to 0 if the input data type is user-defined. Simulink software does not allow the initial output of this block to be inf or NaN.

Inherit sample time

Check this check box to cause the sample time to be inherited from the driving block. If this option is not selected, the block's sample time depends on the type of solver used to simulate the model. If the solver is a variable-step solver, the sample time is continuous but fixed in minor time step ([0, 1]). If the solver is a fixed-step solver, this [0, 1] sample time is converted to the solver's step size after sample time propagation.

Direct feedthrough of input during linearization

Causes the block to output its input during linearization and trim. This sets the block's mode to direct feedthrough.

Enabling this check box can cause a change in the ordering of states in the model when using the functions linmod, dlinmod, or trim. To extract this new state ordering, use the following commands.

First compile the model using the following command, where model is the name of the Simulink model.

    [sizes, x0, x_str] = model([],[],[],'lincompile');

Next, terminate the compilation with the following command.

  model([],[],[],'term');

The output argument, x_str, which is a cell array of the states in the Simulink model, contains the new state ordering. When passing a vector of states as input to the linmod, dlinmod, or trim functions, the state vector must use this new state ordering.

Treat as a unit delay when linearizing with discrete sample time

Select this check box to linearize the Memory block to a unit delay when the Memory block is driven by a signal with a discrete sample time.

The State Attributes pane of this block pertains to code generation and has no effect on model simulation. See Block State Storage and Interfacing in the Real-Time Workshop® Workshop documentation for more information.

Bus Support

The Memory block is a bus-capable block. The input can be a virtual or nonvirtual bus signal subject to the following restrictions:

Characteristics

Bus-capableYes, with restrictions as noted above

Direct Feedthrough

No, except when Direct feedthrough of input during linearization is enabled

Sample Time

Continuous, but inherited from the driving block if you select the Inherit sample time check box

Scalar Expansion

Yes, of the Initial condition parameter

Dimensionalized

Yes

Multidimensionalized

Yes

Zero Crossing

No

  


 © 1984-2008- The MathWorks, Inc.    -   Site Help   -   Patents   -   Trademarks   -   Privacy Policy   -   Preventing Piracy   -   RSS