The Ethernet interface leverages the ARM processor to send and receive information from the design running on the FPGA. The ARM processor runs on a Linux operating system. You can use the Linux operating system services to interact with the FPGA. When using the Ethernet interface, the bitstream is downloaded to the SD card. The bitstream is persistent through power cycles and is reprogrammed each time the FPGA is turned on. The ARM processor is configured with the correct device tree when the bitstream is programmed.
To communicate with the design running on the FPGA, MATLAB leverages the Ethernet connection between the host computer and ARM processor. The ARM processor runs a LIBIIO service, which communicates with a datamover IP in the FPGA design. The datamover IP is used for fast data transfers between the host computer and FPGA, which is useful when prototyping large deep learning networks that would have long transfer times over JTAG. The ARM processor generates the read and write transactions to access memory locations in both the onboard memory and deep learning processor.
This figure shows the high-level architecture of the Ethernet interface.
You can configure your
dlhdl.Workflow object hardware interface to
Ethernet at the time of the workflow object creation. For more information, see Create Target Object That Has an Ethernet Interface and Set IP Address.
The improvement in performance speed of JTAG compared to LIBIIO/Ethernet is listed in this table.
|Write Transfer Speed||225 kB/s||33 MB/s||Approximately 150x|
|Read Transfer Speed||162 kB/s||32 MB/s||Approximately 200x|