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HDL Code Generation and Deployment

Generate HDL code using HDL Coder™, verify code using HDL Verifier™, and prototype designs using hardware support packages

DSP HDL Toolbox™ provides blocks and System objects that support HDL code generation. To generate HDL code from these designs, you must have HDL Coder. HDL Coder also enables you to generate scripts and test benches for use with third-party HDL simulators.

If you have an HDL Verifier license, you can use the FPGA-in-the-loop feature to prototype your HDL design on an FPGA board. HDL Verifier also enables you to cosimulate a Simulink® model with an HDL design running in a third-party simulator.

To design, prototype, and verify domain-specific practical applications on hardware, download hardware support packages such as SoC Blockset™ Support Package for Xilinx® Devices and HDL Coder Support Package for Xilinx FPGA and SoC Devices.


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