FPGA Verification and Debug
R2026bDebug and test HDL code on Intel® FPGAs
HDL Coder™ Support Package for Intel FPGA and SoC Devices contains the board definition files for FPGA-in-the-Loop (FIL) simulation with HDL Coder and supported Intel FPGA and SoC FPGA boards. With FIL simulation, use MATLAB® or Simulink® to test designs in real hardware for any existing HDL code. FPGA Data Capture support lets you observe signals from your design in MATLAB or Simulink while the design is running on the Intel FPGA or SoC FPGA. Using AXI Manager, you can read from or write to on-board memory locations from MATLAB or Simulink.
Categories
- FPGA-in-the-Loop Simulation
Verification with FPGA hardware
- FPGA Data Capture
Capture signal data from live FPGA
- AXI Manager
Access AXI subordinate memory on FPGA board from MATLAB or Simulink
