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Generate HDL for

Select the subsystem or model for HDL code generation

Model Configuration Pane: HDL Code Generation

Description

Select the subsystem or model from which code is generated. The list includes the path to the root model and to subsystems in the model. When you specify this parameter and click the Generate button, HDL Coder™ generates code for the Subsystem that you specify. By default, the HDL code is generated in VHDL language and into the hdlsrc folder.

Settings

path to top level subsystem in root model

Default: The top level subsystem in the root model is selected.

Tips

For example, you can generate HDL code for the symmetric_fir subsystem inside the sfir_fixed model using either of these methods.

  • Specify the subsystem using the property HDLSubsystem as an argument to makehdl.

    makehdl('sfir_fixed','HDLSubsystem','sfir_fixed/symmetric_fir')

  • Pass in the path to the subsystem as an first argument to makehdl.

    makehdl('sfir_fixed/symmetric_fir')

Programmatic Use

Property: HDLSubsystem
Type: character vector
Value: A valid path to your subsystem
Default: Path to the top level subsystem in root model

Version History

Introduced in R2012a

See Also