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Supported EDA Tools and Hardware


Intel Quartus Prime

Use this support package with these recommended versions:

  • Intel® Quartus® Prime Standard 22.1.1

  • Intel Quartus Prime Pro 22.4 (supported for Intel Arria® 10, Cyclone® 10 GX, and Intel Agilex® 7 only)

  • Intel Quartus II 13.1 (supported for Intel Cyclone III boards only)

For tool setup instructions, see Set Up FPGA Design Software Tools.

Board Connections

JTAG Connection

You can run FPGA-in-the-loop, FPGA data capture, or AXI manager over a JTAG cable to your board. However, each feature requires exclusive use of the JTAG cable, so you cannot run more than one feature at the same time. To allow other tools access to the JTAG cable, such as programming the FPGA, and Quartus SignalTap, you must discontinue the JTAG connection in MATLAB®. To release the JTAG cable:

  • FPGA-in-the-loop — Close the Simulink® model, or call the release method of the System object™.

  • FPGA data capture — Close the FPGA Data Capture app, release the System object, or close the Simulink model.

  • AXI manager — Call the release method of the object.

However, the nonblocking capture mode enables you to simultaneously use FPGA data capture and AXI manager, which share a common JTAG interface. For more information, see the "Simultaneous Use of FPGA Data Capture and AXI Manager" section of JTAG Considerations.

For Intel boards, the JTAG clock frequency is 12 or 24 MHz. The JTAG frequency depends on the type of cable and the maximum clock frequency supported by the FPGA board.

Required HardwareRequired Software
  • USB Blaster I or USB Blaster II download cable

  • USB Blaster I or II driver

  • For Windows® operating systems: Quartus Prime executable directory must be on system path.

  • For Linux® operating systems:

    • Versions below Quartus II 13.1 are not supported.

    • Quartus II 14.1 is not supported.

    • Only 64-bit Quartus is supported.

    • Quartus library directory must be on LD_LIBRARY_PATH before starting MATLAB.

    • Prepend the Linux distribution library path before the Quartus library on LD_LIBRARY_PATH. For example, /lib/x86_64-linux-gnu:$QUARTUS_PATH.

Ethernet Connection

You can run FPGA-in-the-loop over an Ethernet connection.

Required HardwareSupported InterfacesRequired Software
  • Gigabit Ethernet card

  • Cross-over Ethernet cable

  • FPGA board with supported Ethernet connection

  • Gigabit Ethernet — GMII

  • Gigabit Ethernet — RGMII

  • Gigabit Ethernet — SGMII

  • Ethernet — MII

  • Ethernet — RMII

There are no software requirements for an Ethernet connection, but ensure that the firewall on the host computer does not prevent UDP communication.

PCI Express

FPGA-in-the-loop over a PCI Express® connection is supported only for 64-bit Windows operating systems.

BoardRequired Software
  • Cyclone V GT FPGA Development Kit

  • DSP Development Kit, Stratix® V Edition

  • Arria 10 GX

Altera® Quartus II 15.0

Related Topics