Control signaling is required to support the transmission of the downlink and uplink transport channels (DL-SCH and UL-SCH). Control information for one or multiple UEs is contained in a Downlink scheduling Control Information (DCI) message and is transmitted through the Physical Downlink Control Channel (PDCCH). DCI messages contain the following information.

DL-SCH resource allocation (the set of resource blocks containing the DL-SCH) and modulation and coding scheme, which allows the UE to decode the DL-SCH.

Transmit Power Control (TPC) commands for the Physical Uplink Control Channel (PUCCH) and UL-SCH, which adapt the transmit power of the UE to save power

Hybrid-Automatic Repeat Request (HARQ) information including the process number and redundancy version for error correction

MIMO precoding information

Depending on the purpose of DCI message, different DCI formats are defined. The DCI formats are given in the following list.

**Format 0**— for transmission of uplink shared channel (UL-SCH) allocation**Format 1**— for transmission of DL-SCH allocation for Single Input Multiple Output (SIMO) operation**Format 1A**— for compact transmission of DL-SCH allocation for SIMO operation or allocating a dedicated preamble signature to a UE for random access**Format 1B**— for transmission control information of multiple-input multiple-output (MIMO) rank-1 based compact resource assignment**Format 1C**— for very compact transmission of PDSCH assignment**Format 1D**— same as*Format 1B*, but with additional information of power offset**Format 2**and**Format 2A**— for transmission of DL-SCH allocation for closed and open loop MIMO operation, respectively**Format 2B**— for the scheduling of dual layer transmission (antenna ports 7 & 8)**Format 2C**— for the scheduling of up to 8 layer transmission (antenna ports 7 to 14) using TM9**Format 2D**— for the scheduling of up to 8 layer transmission (antenna ports 7 to 14) using TM10**Format 3**and**Format 3A**— for transmission of TPC command for an uplink channel**Format 4**— for the scheduling of PUSCH with multi-antenna port transmission mode

In one subframe, multiple UE’s can be scheduled. Therefore, multiple DCI messages can be sent using multiple PDCCH’s.

A PDCCH is transmitted on one or an aggregation of several consecutive control channel elements (CCEs). A CCE is a group of nine consecutive resource-element groups (REGs). The number of CCEs used to carry a PDCCH is controlled by the PDCCH format. A PDCCH format of 0, 1, 2, or 3 corresponds to 1, 2, 4, or 8 consecutive CCEs being allocated to one PDCCH.

The base station creates a DCI message based on a DCI format given in TS 36.212 [1], Section 5.3.3.1. Each field in a DCI message is mapped in order. Zeros may be appended to a DCI message to avoid ambiguous message lengths.

To form the PDCCH payload, the DCI undergoes coding as shown in the following figure.

A cyclic redundancy check (CRC) is used for error detection in DCI messages. The entire PDCCH payload is used to calculate a set of CRC parity bits. The PDCCH payload is divided by a cyclic generator polynomial to generate 16 parity bits. These parity bits are then appended to the end of the PDCCH payload.

As multiple PDCCHs relevant to different UEs can be present in one subframe, the CRC is also used to specify to which UE a PDCCH is relevant. This is done by scrambling the CRC parity bits with the corresponding Radio Network Temporary Identifier (RNTI) of the UE. The scrambled CRC is obtained by performing a bit-wise XOR operation between the 16-bit calculated PDCCH CRC and the 16-bit RNTI.

Different RNTI can be used to scramble the CRC. The following RNTI are some examples.

A UE unique identifier; for example, a Cell-RNTI

A paging indication identifier, or Paging-RNTI, if the PDCCH contains paging information

A system information identifier, or system information-RNTI, if the PDCCH contains system information

When encoding a format 0 DCI message, which contains the UE UL-SCH resource allocation, and the UE transmit antenna selection is configured and applicable, the RNTI scrambled CRC undergoes a bit-wise XOR operation with an antenna selection mask. This mask informs the UE transmit antenna on which port to transmit. The antenna selection masks are given in the following table.

UE transmit antenna selection | Antenna selection mask, <x_{0}^{AS},
…, x_{15}^{AS}> |
---|---|

UE Port 0 | <0,0,0,0,0,0,0,0,0,0,0,0,0,0,0> |

UE Port 1 | <0,0,0,0,0,0,0,0,0,0,0,0,0,0,1> |

The DCI message with the CRC attachment undergoes tail biting convolutional coding as described in TS 36.212 [1], Section 5.1.3.1. Convolutional coding is a form of forward error correction and improves the channel capacity by adding carefully selected redundant information.

LTE uses a rate ⅓ tail-biting encoder with a constraint
length, *k*, of 7. This means that one in three bits
of the output contain useful information while the other two add redundancy.
The structure of the convolutional encoder is shown in the following
figure.

Each output stream of the coder is obtained by convolving the input with the impulse response of the encoder, as shown in the following equation.

$${d}_{k}^{(i)}\to {C}_{k}\ast {G}_{i}$$

The impulse responses are called the generator sequences of the coder. For LTE, there are the following three generator sequences.

*G*_{0}=133 (octal)*G*_{1}=171 (octal)*G*_{2}=165 (octal)

A standard convolutional encoder initializes its internal shift
register to the *all zeros* state, and also ensures
that the coder finishes in the *all zeros* state
by padding the input sequence with *k* zeros at the
end. Knowing the start and end states, which are all zeros, simplifies
the design of the decoder, which is typically an implementation of
the *Viterbi* algorithm.

A tail biting convolutional coder initializes its internal shift
register to the last *k* bits of the current input
block, rather than to the *all zeros* state.
Thus, the start and end states are the same, without the need to zero-pad
the input block. Since the overhead of terminating the coder has been
eliminated, the output block contains fewer bits than a standard convolutional
coder. The drawback is that the decoder becomes more complicated because
the initial state is unknown; however, the decoder does know the start
and end states are the same.

The rate matching block creates an output bitstream with a desired code rate. As the number of bits available for transmission depends on the available resources the rate matching algorithm is capable of producing any arbitrary rate. The three bitstreams from the turbo encoder are interleaved followed by bit collection to create a circular buffer. Bits are selected and pruned from the buffer to create an output bitstream with the desired code rate. The process is illustrated in the following figure.

**Sub-block Interleaver. **The three sub-block interleavers used in the rate matching block
are identical. Interleaving is a technique to reduce the impact of
burst errors on a signal as consecutive bits of data will not be corrupted.

The sub-block interleaver reshapes the encode bit sequence,
row-by-row, to form a matrix with $${C}_{Subblock}^{TC}=32$$ columns
and $${R}_{Subblock}^{TC}$$ rows.
The variable $${R}_{Subblock}^{TC}$$ is
determined by finding the minimum integer such that the number of
encoded input bits is $$D\le \left({R}_{Subblock}^{TC}\times {C}_{Subblock}^{TC}\right)$$.
If $$\left({R}_{Subblock}^{TC}\times {C}_{Subblock}^{TC}\right)>D$$, *N _{D}*

`<NULL>`

’s
are appended onto the front of the encoded sequence. In this case, $${N}_{D}+D=\left({R}_{Subblock}^{TC}\times {C}_{Subblock}^{TC}\right)$$. Inter-column permutation is performed on the matrix to reorder the columns as shown in the following pattern.

1, 17, 9, 25, 5, 21, 13, 29, 3, 19, 11, 27, 7, 23, 15, 31, 0, 16, 8, 24, 4, 20, 12, 28, 2, 18, 10, 26, 6, 22, 14, 30 |

The output of the block interleaver is the bit sequence read out column-by-column from the inter-column permutated matrix to create a stream $${K}_{\pi}=\left({R}_{Subblock}^{TC}\times {C}_{Subblock}^{TC}\right)$$ bits long.

**Bit Collection, Selection, and Transmission. **The bit collection stage creates a virtual circular buffer by
combining the three interleaved encoded bit streams, as shown in the
following figure.

Bits are then selected and pruned from the circular buffer to
create an output sequence length which meets the desired code rate.
This is achieved by sequentially outputting the bits in the circular
buffer from *w*_{0} (looping
back to *w*_{0} after *w*_{3Kπ–1}),
discarding `<NULL>`

bits, until the length
of the output is *x* times the length of the input,
creating a coding rate of 1/*x*.

The coded DCI messages for each control channel are multiplexed, scrambled, and undergo QPSK modulation, layer mapping, and precoding, as shown in the following figure.

The blocks of coded bits for each control channel are multiplexed in order to create a block of data, as shown in the following figure.

The variable $${M}_{bits}^{i}$$ is
the number of bits in the *i*^{th} control
channel and $${n}_{PDCCH}$$ is
the number of control channels.

If necessary, `<NIL>`

elements are inserted
in the block of bits prior to scrambling to ensure PDCCHs start at
particular CCE positions and the length of the block of bits matches
the amount of REGs not assigned to PCFICH or PHICH.

The PDCCH region consists of CCEs which could be allocated to a PDCCH. The configuration of how PDCCHs are mapped to CCEs is flexible.

Common and UE-specific PDCCHs are mapped to CCEs differently; each type has a specific set of search spaces associated with it. Each search space consists of a group of consecutive CCEs which could be allocated to a PDCCH called a PDCCH candidate. The CCE aggregation level is given by the PDCCH format and determines the number of PDCCH candidates in a search space. The number of candidates and size of the search space for each aggregation level is given in the following table.

Search space, S_{k}^{(L)} | Number of PDCCH candidates, M^{(L)} | ||
---|---|---|---|

Type | Aggregation level, L | Size, in CCEs | |

UE-specific | 1 | 6 | 6 |

2 | 12 | 6 | |

4 | 8 | 2 | |

8 | 16 | 2 | |

Common | 4 | 16 | 4 |

8 | 16 | 2 |

If the bandwidth is limited, not all candidates may be available because the PDCCH region is truncated.

A PDCCH can be mapped to any candidate within its suitable search space, as long as the allocated CCEs within the candidate do not overlap with a PDCCH already allocated. A simple example that shows the PDCCH candidates of two aggregation levels within a PDCCH region is shown in the following figure.

In this example, only 11 CCEs are available due to bandwidth constraints. The CCEs used to construct each PDCCH candidate are defined by the following equation.

$$L\left\{\left(Y{}_{k}+m\right)\mathrm{mod}\lfloor {N}_{CCE,k}/L\rfloor \right\}+i$$

The preceding equation contains the following variables.

$${N}_{CCE,k}$$ — number of CCEs in a subframe,

*k**m*— number of PDCCH candidates in a given space, $$m=0,\dots ,{M}^{(L)}-1$$*L*— aggregation level*i*— an integer between 0 and*L*–1, $$i=0,\dots ,L-1$$

When a common search space is used, $${Y}_{k}$$ is 0. When a UE-specific search space is used, $${Y}_{k}$$ is given by the following equation.

$${Y}_{k}=\left(A{Y}_{k-1}\right)\mathrm{mod}D$$

In the preceding equation, *A* is 39,872, *D* is
65,537, and *Y*_{–1} is
the nonzero UE radio network temporary identifier.

This multiplexed block of bits undergoes a bit-wise exclusive-or (XOR) operation with a cell-specific scrambling sequence.

The scrambling sequence is pseudorandom, created using a length-31 Gold sequence generator and initialized using the slot number within the radio frame, $${n}_{s}$$, and the cell ID, $${N}_{ID}^{cell}$$, at the start of each subframe, as shown in the following equation.

$${c}_{init}=\lfloor \frac{{n}_{s}}{2}\rfloor {2}^{9}+{N}_{ID}^{cell}$$

Scrambling serves the purpose of intercell interference rejection. When a UE descrambles a received bitstream with a known cell specific scrambling sequence, interference from other cells will be descrambled incorrectly, therefore only appearing as uncorrelated noise.

The scrambled bits then undergo QPSK modulation to create a block of complex-valued modulation symbols.

The complex symbols are mapped to one, two, or four layers depending
on the number of transmit antennas used. The complex modulated input
symbols, $${d}^{(0)}(i)$$,
are mapped onto *v* layers, $${x}^{(0)}(i),{x}^{(1)}(i),\dots ,{x}^{(v-1)}(i)$$.

If a single antenna port is used, only one layer is used. Therefore, $${x}^{(0)}(i)={d}^{(0)}(i)$$.

If transmitter diversity is used, the input symbols are mapped to layers based on the number of layers.

**Two Layers**— Even symbols are mapped to layer 0 and odd symbols are mapped to layer 1, as shown in the following figure.**Four Layers**— The input symbols are mapped to layers sequentially, as shown in the following figure.

The precoder takes a block from the layer mapper, $${x}^{(0)}(i),{x}^{(1)}(i),\dots ,{x}^{(v-1)}(i)$$,
and generates a sequence for each antenna port, $${y}^{(p)}(i)$$.
The variable *p* is the transmit antenna port number,
and can assume values of {0}, {0,1}, or {0,1,2,3}.

For transmission over a single antenna port, no processing is carried out, as shown in the following equation.

$${y}^{(p)}(i)={x}^{(0)}(i)$$

Precoding for transmit diversity is available on two or four antenna ports.

**Two Antenna Port Precoding. **An Alamouti scheme is used for precoding, which defines the
relationship between input and output as shown in the following equation.

$$\left(\begin{array}{c}{y}^{(0)}(2i)\\ {y}^{(1)}(2i)\\ {y}^{(0)}(2i+1)\\ {y}^{(1)}(2i+1)\end{array}\right)=\frac{1}{\sqrt{2}}\left(\begin{array}{cccc}1& 0& j& 0\\ 0& -1& 0& j\\ 0& 1& 0& j\\ 1& 0& -j& 0\end{array}\right)\left(\begin{array}{c}\mathrm{Re}\left\{{x}^{(0)}(i)\right\}\\ \mathrm{Re}\left\{{x}^{(1)}(i)\right\}\\ \mathrm{Im}\left\{{x}^{(0)}(i)\right\}\\ \mathrm{Im}\left\{{x}^{(1)}(i)\right\}\end{array}\right)$$

In the Alamouti scheme, two consecutive symbols, $${x}^{(0)}(i)$$ and $${x}^{(1)}(i)$$, are transmitted in parallel using two antennas with the following mapping, where the asterisk symbol (*) denotes the complex conjugate operation.

As any two columns in the precoding matrix are orthogonal, the two symbols, $${x}^{(0)}(i)$$ and $${x}^{(1)}(i)$$, can be separated at the UE.

**Four Antenna Port Precoding. **Precoding for the four antenna port case defines the relationship
between the input and output as shown in the following equation.

$$\left(\begin{array}{c}{y}^{(0)}(4i)\\ {y}^{(1)}(4i)\\ {y}^{(2)}(4i)\\ {y}^{(3)}(4i)\\ {y}^{(0)}(4i+1)\\ {y}^{(1)}(4i+1)\\ {y}^{(2)}(4i+1)\\ {y}^{(3)}(4i+1)\\ {y}^{(0)}(4i+2)\\ {y}^{(1)}(4i+2)\\ {y}^{(2)}(4i+2)\\ {y}^{(3)}(4i+2)\\ {y}^{(0)}(4i+3)\\ {y}^{(1)}(4i+3)\\ {y}^{(2)}(4i+3)\\ {y}^{(3)}(4i+3)\end{array}\right)=\frac{1}{\sqrt{2}}\left(\begin{array}{cccccccc}1& 0& 0& 0& j& 0& 0& 0\\ 0& 0& 0& 0& 0& 0& 0& 0\\ 0& -1& 0& 0& 0& j& 0& 0\\ 0& 0& 0& 0& 0& 0& 0& 0\\ 0& 1& 0& 0& 0& j& 0& 0\\ 0& 0& 0& 0& 0& 0& 0& 0\\ 1& 0& 0& 0& -j& 0& 0& 0\\ 0& 0& 0& 0& 0& 0& 0& 0\\ 0& 0& 0& 0& 0& 0& 0& 0\\ 0& 0& 1& 0& 0& 0& j& 0\\ 0& 0& 0& 0& 0& 0& 0& 0\\ 0& 0& 0& -1& 0& 0& 0& j\\ 0& 0& 0& 0& 0& 0& 0& 0\\ 0& 0& 0& 1& 0& 0& 0& j\\ 0& 0& 0& 0& 0& 0& 0& 0\\ 0& 0& 1& 0& 0& 0& -j& 0\end{array}\right)\left(\begin{array}{c}\mathrm{Re}\left\{{x}^{(0)}(i)\right\}\\ \mathrm{Re}\left\{{x}^{(1)}(i)\right\}\\ \mathrm{Re}\left\{{x}^{(2)}(i)\right\}\\ \mathrm{Re}\left\{{x}^{(3)}(i)\right\}\\ \mathrm{Im}\left\{{x}^{(0)}(i)\right\}\\ \mathrm{Im}\left\{{x}^{(1)}(i)\right\}\\ \mathrm{Im}\left\{{x}^{(2)}(i)\right\}\\ \mathrm{Im}\left\{{x}^{(3)}(i)\right\}\end{array}\right)$$

In this scheme, two consecutive symbols are transmitted in parallel in two symbol periods using four antennas with the following mapping, where the asterisk symbol (*) denotes the complex conjugate operation.

The complex valued symbols for each antenna are divided into quadruplets for mapping to resource elements. The sets of quadruplets then undergo permutation (interleaving) and cyclic shifting before being mapped to resource elements (REs) within resource-element groups (REGs).

**Permutation. **The blocks of quadruplets are interleaved as discussed in Sub-block Interleaver. However, instead
of bits being interleaved, blocks of quadruplets are interleaved by
substituting the term *bit sequence* with the
term *symbol-quadruplet sequence*.

`<NULL>`

symbols from the output of the
interleaver are removed to form a sequence of interleaved quadruplets
at each antenna, $${w}^{(p)}(i)$$.

**Cyclic Shifting. **The interleaved sequence of quadruplets at each antenna is cyclically
shifted, according to the following equation.

$${\overline{w}}^{(p)}(i)={w}^{(p)}(i)\left(\left(i+{N}_{ID}^{cell}\right)\mathrm{mod}{M}_{quad}\right)$$

In the preceding equation, the variable $${M}_{quad}$$ is the number of quadruplets, such that $${M}_{quad}={M}_{symb}/4$$, and $${N}_{ID}^{cell}$$ is the cell ID.

**Mapping. **The cyclic shifted symbol quadruplets are mapped to REGs that
are not assigned to PCFICH or PHICH.

Each symbol-quadruplet is mapped to an unallocated REG in order, starting with the REG $$({k}^{\prime}=0,{l}^{\prime}=0)$$. Symbol quadruplet $${\overline{w}}^{(p)}({m}^{\prime})$$ maps to the REG $${m}^{\prime}$$. Then, the REG symbol index, $${l}^{\prime}$$, is incremented until all the REGs at subcarrier index $${k}^{\prime}=0$$ have been allocated. Next, the REG subcarrier index, $${k}^{\prime}$$, is incremented, and the process repeats. This mapping continues until all symbol quadruplets have been allocated REGs.

The mapping for an example resource grid is shown in the following figure.

Four transmit antenna ports and a control region size of three OFDM symbols are used to create the grid. In this example, the REG $$({k}^{\prime}=0,{l}^{\prime}=0)$$ is allocated to PCFICH, so no symbol quadruplets are allocated to it. The symbol-quadruplets are first mapped to REG $$({k}^{\prime}=0,{l}^{\prime}=1)$$, followed by $$({k}^{\prime}=0,{l}^{\prime}=2)$$. Since there are no further REGs with $${k}^{\prime}=0$$, the next REG allocated is REG $$({k}^{\prime}=4,{l}^{\prime}=2)$$ because this REG has the lowest value of $${l}^{\prime}$$ not already allocated. This process repeats to allocate all the symbol quadruplets to REGs.

[1] 3GPP TS 36.212. “Multiplexing and channel coding.”
*3rd Generation Partnership Project; Technical Specification Group Radio
Access Network; Evolved Universal Terrestrial Radio Access (E-UTRA)*.
URL: http://www.3gpp.org.

`lteCRCDecode`

| `lteCRCEncode`

| `lteConvolutionalDecode`

| `lteConvolutionalEncode`

| `lteDCI`

| `lteDCIEncode`

| `lteDLDeprecode`

| `lteDLPrecode`

| `lteLayerDemap`

| `lteLayerMap`

| `ltePDCCH`

| `ltePDCCHDecode`

| `ltePDCCHDeinterleave`

| `ltePDCCHIndices`

| `ltePDCCHInfo`

| `ltePDCCHInterleave`

| `ltePDCCHPRBS`

| `ltePDCCHSpace`

| `lteRateMatchConvolutional`

| `lteRateRecoverConvolutional`

| `lteSymbolDemodulate`

| `lteSymbolModulate`