Generate ideal, time varying pulse signal
Simulink / Discontinuities
Use the Variable Pulse Generator block to create ideal modulated pulse signals.
Generally speaking, the output pulse of the block is described by
where pw is the output pulse width.
For an implementation of Pulse Width Modulation, see PWM.
D— Duty Cycle
Desired duty cycle of the pulse P, specified as scalar within the range [0,1].
Time between rising edges of consecutive pulses of the output signal. A smaller value represents a higher frequency pulse.
Port 1— Modulated pulse signal
Modulated output pulse signal corresponding to input duty cycle.
Allow zero pulse width— Allow zero magnitude of output signal
Enable this parameter to allow the output pulse signal to support pulses of width 0.
Enabling this parameter causes the block to have direct feedthrough. This can cause algebraic loops in your model.
Run at fixed time intervals— Choose continuous or discrete-time behavior
Select whether the block should operate in continuous or discrete sampling modes.
By default, the block uses
continuous sampling mode as it
improves simulation performance with variable step solvers.
discrete sampling mode if you need to:
use a fixed-step solver
sample the block output
Sampling rate— Set pulse resolution
Specify the rate at which the block samples input duty cycle signal. This sampling rate becomes the resolution of the output pulse signal.
This parameter requires that Sampling mode is set to
For a pulse starting at time tk
where pw is the pulse width. For a given period P, pw is proportional to the duty cycle D
In Discrete sampling mode, the input duty cycle signal is sampled at the rate specified by the Sampling rate parameter.
For a specified sampling rate tS , the number of samples needed for a pulse of width pw can be expressed as follows
where nP is the number of samples needed to simulate a pulse of period P.
Consider a nominal pulse of period P with the sampling rate of the block set to be tS= 0.25 P. The number of samples needed for one period of the pulse, nP= 4. Thus, for the input duty cycle D= 0.47 , the number of samples n pw is floored to = 1. Therefore, the pulse is high for 1 of the 4 samples in the period.
Not recommended for production-quality code. Relates to resource limits and restrictions on speed and memory often found in embedded systems. The code generated can contain dynamic allocation and freeing of memory, recursion, additional memory overhead, and widely-varying execution times. While the code is functionally valid and generally acceptable in resource-rich environments, smaller embedded targets often cannot support such code.
In general, consider using the Simulink Model Discretizer to map continuous blocks into discrete equivalents that support production code generation. To start the Model Discretizer, in the Simulink® Editor, on the Apps tab, under Apps, under Control Systems, click Model Discretizer. One exception is the Second-Order Integrator block because, for this block, the Model Discretizer produces an approximate discretization.