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Software Trigger CPU<->CLA

Trigger software events between processor (CPU) and control law accelerator (CLA)

Since R2022a

  • Software Trigger CPU<->CLA block

C2000 Microcontroller Blockset / Scheduling


The Software Trigger CPU<->CLA block simulates the triggering of software events between processor (CPU) and CLA in a supported Texas Instruments® hardware board. When you use this block as a task on a CPU, the block generates an event to execute tasks on the connected CLA unit. When you use this block as a task on the CLA, the block generates an event to execute tasks on the connected CPU. Use this block to manage the communication and synchronization between the CPU and CLA.



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Specify an event signal to start the software interrupt in the CPU or CLA.

Data Types: Boolean


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This port sends a message at whenever the trigger condition occurs. Specify the trigger condition in the Trigger condition parameter. This output connects to the input of the Task Manager (SoC Blockset) block to execute the associated event-driven task.


The Outport block, at the top-level of the reference model that contains the Software Trigger CPU<->CLA block, that connects to this event port must be configured as a non-virtual bus.

Data Types: rteEvent


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Specify the number of the CLA task to trigger.

Generate an event on the event port either on a rising edge of the data port or whenever the input is high. To generate an event when the input signal changes from zero to one, set this parameter to Rising edge. To generate an event once per execution of the task, set this parameter to Input high.

Specify the trigger type of on the CPU. To generate an event and continue running the CPU, set this parameter to Trig. To generate an event and instruct the CPU to wait for the interrupt to complete, set this parameter to TrigAndWait(codegen). The TrigAndWait(codegen) option does not run in simulation.


To enable this parameter, the block must be inside a reference model with the Processing Unit set to one of the CPUs.

Version History

Introduced in R2022a