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DVBS2 Symbol Demodulator

Demodulate complex constellation symbols to set of LLR values

  • Library:
  • Wireless HDL Toolbox / Modulation

  • DVBS2 Symbol Demodulator block

Description

The DVBS2 Symbol Demodulator block demodulates complex data symbols to log likelihood ratios (LLR) values based on the modulation types supported by the Digital Video Broadcast Satellite Second Generation (DVB-S2) standard [1]. The block accepts equalized complex data symbols and a samplecontrol bus and outputs demodulated LLR values and a samplecontrol bus. The number of demodulated LLR values for a given symbol depends on the modulation type, as shown in this table.

Modulation TypeNumber of LLR Values per Symbol
QPSK2
8-PSK3
16-APSK4
32-APSK5
pi/2-BPSK1

The block provides an architecture suitable for HDL code generation and hardware deployment. You can use this block in the development of a DVB-S2 receiver.

Ports

Input

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Data symbols, specified as a real- or complex-valued scalar.

double and single data types are supported for simulation, but not for HDL code generation.

For HDL code generation, the input data type must be signed fixed point and the maximum input word length the block supports is 32 bits.

Data Types: single | double | int8 | int16 | int32 | signed fixed point
Complex Number Support: Yes

Control signals accompanying the sample stream, specified as a samplecontrol bus. The bus includes the start, end, and valid control signals, which indicate the boundaries of the frame and the validity of the samples.

  • start — Indicates the start of the input frame

  • end — Indicates the end of the input frame

  • valid — Indicates that the data on the input data port is valid

For more detail, see Sample Control Bus.

Data Types: bus

Modulation index, specified as 0, 1, 2, 3, or 4. Each value represents a specific modulation type, as shown in this table.

Modulation IndexModulation Type
0 QPSK
18-PSK
216-APSK
332-APSK
4 pi/2-BPSK

If you specify a value other than ones listed in this table, the block displays a warning message and applies QPSK modulation. Specify this value in fixdt(0,3,0) format.

Dependencies

To enable this port, set the Modulation source parameter to Input port.

Data Types: fixdt(0,3,0)

Code rate index, specified as 5, 6, 7, 8, 9, or 10. Each value represents a specific code rate, as shown in this table.

Code Rate IndexCode Rate
5 2/3
63/4
74/5
85/6
9 8/9
109/10

The code rates in this table are applicable for the modIdx input port values 2 and 3, which imply 16-APSK and 32-APSK modulations, respectively. When you set the modIdx port values to 0, 1, or 4, the block ignores the codeRateIdx input port values.

Specify this value in fixdt(0,4,0) format.

Dependencies

To enable this port, set the Modulation source parameter to Input port.

Data Types: fixdt(0,4,0)

Output

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Demodulated LLR values, returned as a 8-element real-valued column vector. For double and single inputs, the output data type is the same as the input data type. For fixed point inputs, the block provides the output with an integer bit growth of 3 bits.

Data Types: single | double | int8 | int16 | int32 | fixed point

Control signals accompanying the sample stream, returned as a samplecontrol bus. The bus includes the start, end, and valid control signals, which indicate the boundaries of the frame and the validity of the samples.

  • start — Indicates the start of the output frame

  • end — Indicates the end of the output frame

  • valid — Indicates that the data on the output data port is valid

For more detail, see Sample Control Bus.

Data Types: bus

Parameters

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To specify the modulation type from the Modulation parameter, select Property. To specify the modulation type from the modIdx port during run time, select Input port.

Select the modulation type.

Dependencies

To enable this parameter, set the Modulation source parameter to Property.

Select the code rate.

Dependencies

To enable this parameter set the Modulation source parameter to Property and the Modulation parameter to 16-APSK or 32-APSK.

Select this parameter to perform symbol demodulation with a normalized constellation. Clear this parameter to perform symbol demodulation using the constellation defined as per the standard [1].

When you specify 0, 1, or 4 using the modIdx input port or set the Modulation parameter to QPSK, 8-PSK, or pi/2-BPSK, the block ignores this parameter during its operation.

Dependencies

To enable this parameter, set the Modulation source parameter to Input port or set the Modulation source to Property and the Modulation parameter to 16-APSK or 32-APSK.

Algorithms

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The block uses the soft-decision algorithm approximate LLR to demodulate complex data symbols. You can compute approximate LLR by using only the nearest constellation point to the received signal with a 0 (or 1) at that bit position. The LLR for a bit b can be defined as

LLR(b)=1σ2(minsS1|zs|2minsS0|zs|2).Here,σ2=1.

z is the received sequence, s is a symbol from constellation, and S0, S1 are the set of symbols that correspond to bit being 0 and 1 respectively. For more information, see [2].

References

[1] ETSI Standard EN 302 307 V1.4.1: Digital Video Broadcasting (DVB); Second generation framing structure, channel coding and modulation systems for Broadcasting, Interactive Services, News Gathering and other broadband satellite applications (DVB-S2), European Telecommunications Standards Institute, Valbonne, France, 2005-03.

[2] Viterbi, A.J. “An Intuitive Justification and a Simplified Implementation of the MAP Decoder for Convolutional Codes.” IEEE Journal on Selected Areas in Communications 16, no. 2 (February 1998): 260–64. https://doi.org/10.1109/49.661114.

Extended Capabilities

Introduced in R2021b