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Modulate frequency-domain OFDM subcarriers to time-domain samples for custom communication protocols

**Library:**Wireless HDL Toolbox / Modulation

The OFDM Modulator block modulates frequency-domain orthogonal frequency division multiplexing (OFDM) subcarriers to time-domain samples based on the OFDM parameters. The block supports 5G new radio (NR) standard, long term evolution (LTE) [1], wireless local area network (WLAN 802.11a/g/n/ac) [2], WiMAX, digital video broadcast (DVB), and digital audio broadcast (DAB) standards.

The block accepts input data along with a valid control signal and these OFDM parameters:
FFT length, CP length, and the number of right and left guard subcarriers. The block outputs
modulated data along with valid and ready controls signals. The block samples the
corresponding OFDM parameters only when the **ready** port is
`1`

(high) and when the first **valid** port of each OFDM
symbol is `1`

(high).

The block supports scalar and vector inputs. You can use a vector input to increase the data throughput and achieve a giga-sample-per-second (GSPS) throughput. The block supports windowing for scalar and vector inputs to reduce the spectral regrowth, or adjacent channel leakage ratio (ACLR), of an OFDM signal. The block provides an interface and architecture suitable for HDL code generation and hardware deployment.

`data`

— Input datascalar | column vector

Input data, specified as a scalar or column vector of real or complex values. The vector size must be a power of 2 and in the range from 1 to 64, and less than or equal to the FFT length. For more information on how to specify vector inputs, see Specifying Vector Input.

`double`

and `single`

data
types are supported for simulation, but not for HDL code generation.

**Data Types: **`single`

| `double`

| `int8`

| `int16`

| `int32`

| `signed fixed point`

**Complex Number Support: **Yes

`valid`

— Indicates valid input datascalar

Indicates valid input data, specified as a scalar.

This port is a control signal that indicates when the sample from the
**data** input port is valid. When this value is
`1`

, the block captures the values on the **data**
input port. When this value is `0`

, the block ignores the values on
the **data** input port.

**Data Types: **`Boolean`

`FFTLen`

— Length of FFTscalar

Length of the FFT, specified as a scalar. The FFT length must be power of 2 and in
the range from 8 to 65,536. This value must be less than or equal to the
**Maximum FFT length** parameter value.

To support the minimum FFT length of 8, the **FFTLen** data type
must be `fixdt(0,k,0)`

, where *k* is greater than or
equal to 4.

To enable this port, set the **OFDM parameters source**
parameter to `Input port`

.

**Data Types: **`single`

| `double`

| `uint8`

| `uint16`

| `uint32`

| `unsigned fixed point`

`CPLen`

— Length of cyclic prefixscalar

Length of the cyclic prefix, specified as a scalar in the range from 0 to
**FFTLen**.

To support the minimum FFT length of 8, the **CPLen** data type
must be `fixdt(0,k,0)`

, where *k* is greater than or
equal to 4.

To enable this port, set the **OFDM parameters source**
parameter to `Input port`

.

**Data Types: **`single`

| `double`

| `uint8`

| `uint16`

| `uint32`

| `unsigned fixed point`

`numLgSc`

— Number of left guard carriers of OFDM symbolscalar

Number of left guard carriers of the OFDM symbol, specified as a scalar in the
range from 0 to (**FFTLen**/2) – 1.

To support the minimum FFT length of 8, the **numLgSc** data type
must be `fixdt(0,k,0)`

, where *k* is greater than or
equal to 2.

To enable this port, set the **OFDM parameters source**
parameter to `Input port`

.

**Data Types: **`single`

| `double`

| `uint8`

| `uint16`

| `uint32`

| `unsigned fixed point`

`numRgSc`

— Number of right guard carriers of OFDM symbolscalar

Number of right guard carriers of the OFDM symbol, specified as a scalar in the
range from 0 to (**FFTLen**/2) – 1.

To support the minimum FFT length of 8, the **numRgSc** data type
must be `fixdt(0,k,0)`

, where *k* is greater than or
equal to 2.

To enable this port, set the **OFDM parameters source**
parameter to `Input port`

.

**Data Types: **`single`

| `double`

| `uint8`

| `uint16`

| `uint32`

| `unsigned fixed point`

`reset`

— Clear internal statesscalar

Clear internal states, specified as a Boolean scalar. When this value is
`1`

, the block stops the current calculation and clears all
internal states.

To enable this port, select the **Enable reset input port**
parameter.

**Data Types: **`Boolean`

`winLen`

— Length of windowscalar

Length of the window for overlap-adding of adjacent OFDM symbols, specified as a
scalar in the range from 1 to **Maximum window length**.

To enable this port, set the **OFDM parameters source**
parameter to `Input port`

.

**Data Types: **`single`

| `double`

| `uint8`

| `uint16`

| `uint32`

| `unsigned fixed point`

`data`

— Modulated output datascalar | column vector

Modulated output data, returned as a complex-valued scalar or column vector. The
data type this output is dependent on the data type of the input
**data** port.

When you set the

**OFDM parameters source**parameter to`Property`

and clear the**Divide butterfly outputs by two**parameter, the output word length increases by log_{2}(**FFT length**) bits.When you set the

**OFDM parameters source**parameter to`Input port`

and clear the**Divide butterfly outputs by two**parameter, the output word length increases by log_{2}(**Maximum FFT length**) bits.

To avoid overflow, select the **Divide butterfly outputs by two**
parameter.

**Data Types: **`single`

| `double`

| `int8`

| `int16`

| `int32`

| `signed fixed point`

**Complex Number Support: **Yes

`valid`

— Indicates valid output datascalar

Indicates valid output data, returned as a scalar.

This port is a control signal that indicates when the **data**
output port is valid. The block sets this value to `1`

when the data
samples are available on the **data** output port.

**Data Types: **`Boolean`

`ready`

— Indicates block is readyscalar

Indicates block is ready, returned as a scalar.

This is a control signal that indicates when the block is ready for new input
data. When this value is `1`

, the block accepts input data in the
next time step. When this value is `0`

, the block ignores input data
in the next time step.

**Data Types: **`Boolean`

`OFDM parameters source`

— Source of OFDM parameters`Property`

(default) | `Input port`

You can set OFDM parameters with an input port or by selecting a value for the parameter.

Select `Property`

to enable the **FFT
length**, **Cyclic prefix length**, **Number of
left guard subcarriers**, and **Number of right guard
subcarriers** parameters.

Select `Input port`

to enable the
**FFTLen**, **CPLen**,
**numLgSc**, and **numRgSc** input ports and the
**Maximum FFT length** parameter. The **Maximum
FFT length** parameter sets the upper bound of the range of valid values
for the **FFTLen** input port.

`Maximum FFT length`

— Maximum length of FFT length`64`

(default) | power of 2 in range from 8 to 65,536Specify the maximum length of the FFT.

To enable this parameter, set the **OFDM parameters source**
parameter to `Input port`

.

`FFT length`

— Length of FFT`64`

(default) | power of 2 in range from 8 to 65, 536Specify the FFT length.

When you set the **OFDM parameters source** parameter to
`Property`

, the block uses the **FFT
length** value as the maximum FFT length.

To enable this parameter, set the **OFDM parameters source**
parameter to `Property`

.

`Cyclic prefix length`

— Length of cyclic prefix`16`

(default) | integer in range from 0 to Specify the length of the cyclic prefix.

To enable this parameter, set the **OFDM parameters source**
parameter to `Property`

.

`Number of left guard subcarriers`

— Number of guard band subcarriers in left extreme of OFDM symbol`6`

(default) | integer in range from 0 to (Specify the number of left guard subcarriers.

To enable this parameter, set the **OFDM parameters source**
parameter to `Property`

.

`Number of right guard subcarriers`

— Number of guard band subcarriers in right extreme of OFDM symbol`5`

(default) | integer in range from 0 to (Specify the number of right guard subcarriers.

To enable this parameter, set the **OFDM parameters source**
parameter to `Property`

.

`Insert DC Null`

— Option to insert DC null`on`

(default) | `off`

Select this parameter to insert a null on the DC subcarrier.

`Enable reset input port`

— Reset signal`off`

(default) | `on`

Select this parameter to enable the **reset** input port.

`Windowing`

— Spectral growth reduction`off`

(default) | `on`

Select this parameter to perform a windowing operation that reduces spectral growth based on the specified window length. Clear this parameter to disable the windowing operation. For more information about windowing, see Windowing.

`Window length`

— Length of window`4`

(default) | even integer in range from 1 to Specify the window length to overlap-add adjacent OFDM symbols.

To enable this parameter, set the **OFDM parameters source**
parameter to `Property`

and select the
**Windowing** parameter.

`Maximum window length`

— Maximum length of window`8`

(default) | integer in the range from 1 to Specify the maximum window length.

To enable this parameter, set the **OFDM parameters source**
parameter to `Input port`

and select the
**Windowing** parameter.

`Divide butterfly outputs by two`

— Divide FFT butterfly outputs by two`on`

(default) | `off`

This parameter controls the scaling option of the IFFT HDL Optimized (DSP System Toolbox) block inside the OFDM Modulator block.

When you select this parameter, the FFT implements an overall
1/*N* scale factor by dividing the output of each butterfly
multiplication by two. This adjustment keeps the output of the IFFT in the same
amplitude range as its input. If you clear this parameter, the block avoids overflow
by increasing the word length by one bit after each butterfly multiplication.

`Rounding Method`

— Rounding mode for internal fixed-point calculations`Floor`

(default) | `Ceiling`

| `Convergent`

| `Nearest`

| `Round`

| `Zero`

This parameter specifies the type of rounding mode for internal fixed-point
calculations. For more information about rounding modes, see Rounding Modes (DSP System Toolbox). When the input is any integer data
type or fixed-point data type, the FFT algorithm uses fixed-point arithmetic for
internal calculations. This parameter does not apply when the input is of data type
`single`

or `double`

. Rounding applies to
twiddle-factor multiplication and scaling operations.

The OFDM Modulator block accepts active input subcarriers, which are
calculated using the formula **FFT length** - (**Number of left
guard subcarriers** + **Number of right guard subcarriers** +
**Insert DC Null**). When you specify a vector input, if the number of
active input subcarriers are insufficient to accommodate the vector length of data samples,
you must pad zeros to the input to make it a complete vector. For example, if the number of
active data subcarriers is 62, and the vector length is 16, you can specify the 48 data
samples in 3 valid cycles and the remaining 14 data samples in the 4th valid cycle by
padding two zeros to match the vector length of 16. If the number of active data subcarriers
is 64, and the vector length is 16, you can specify the complete data samples in 4 valid
cycles.

The block outputs **Cyclic prefix length** + **FFT
length** number of samples. If the output data samples returned are insufficient
to accommodate the vector length, the block stores the remaining samples and outputs them
along with the data samples in the first valid cycle of the next data symbol. For example,
if the number of data samples to be returned is 62, and the specified vector length is 16,
the block returns 48 data samples in 3 valid cycles, stores the remaining 14 data samples
and outputs them in the first output valid cycle of the next data symbol. If the number of
data samples to be returned is 64, and the specified vector length is 16, the block returns
data samples in 4 valid cycles.

**Example 1**

For a vector input of size 32 with block parameter **FFT length** set
to `64`

, **Cyclic prefix length** set to
`16`

, **Number of left guard subcarriers** set to
`6`

, **Number of right guard subcarriers** set to
`5`

, and **Insert DC Null** set to
`off`

, the block accepts 53 active data subcarriers.

In the figure, D1 and D2 indicate the active data subcarriers, Z indicates padded zeros, and S1 and S2 indicate modulated output data symbols.

To provide 53 active data subcarriers of vector length 32, two cycles are needed. In this case, you must send the first set of data samples as D1(1:32), send the second set of data samples as D1(33:53), and pad the remaining samples with zeros Z(1:11) to make the complete vector. Similarly, the block processes D2 based on the block parameter values.

The block outputs **Cyclic prefix length** + **FFT
length** number of samples, which means 80 data samples in this example. In the
figure, S1(1:16) contains the added cyclic prefix, and S1(17:80) contains the data samples
of the first data symbol S1, which is returned as S1(17:32), S1(33:64), and the remaining 16
data samples S1(65:80) stored and returned at the first valid cycle of the second data
symbol S2. Similarly, the block outputs S2 based on the block parameter values as shown in
the figure.

**Example 2**

For a vector input of size 32 with block inputs **FFTLen**,
**CPLen**, **numLgSc**, and **numRgSc**
specified as `128`

, `10`

, `28`

, and
`27`

, respectively, at the first valid high cycle and with the
**Insert DC Null** parameter cleared, the block accepts 73 active data
subcarriers.

In the figure, D1 and D2 indicate the active data subcarriers, Z indicates padded zeros, and S1 and S2 indicate modulated output data symbols.

To provide 73 active data subcarriers of vector length 32, three cycles are needed. In this case, you must send the first set of data samples as D1(1:32), send the second set of data samples as D1(65:96), send the third set of data samples as D1(65:72), and pad the remaining samples with zeros Z(1:24) to make the complete vector. Similarly, the block processes D2 based on the port values.

The block outputs **Cyclic prefix length** + **FFT
length** number of samples, which means 138 data samples in this example. In the
figure, the output S1(1:10) contains the added cyclic prefix, and S1(11:138) contains the
data samples of the first data symbol S1, which is returned as S1(11:32), S1(33:64),
S1(65:96), S1(97:128), and the remaining 10 data samples S1(129:138) stored and returned at
the first valid cycle of the second data symbol S2. Similarly, the block outputs S2 based on
the port values shown in the figure.

The OFDM Modulator block operation sequence is implemented using these blocks: Ready Generator, Symbol Formation, Sample Repeater, IFFT, FFT Shifter, Down Sampler, CP Addition, and Windowing. The windowing feature is supported for scalar and vector inputs. The parameters shown in this figure configure the behavior of the block.

The Ready Generator subsystem controls input data samples by calculating the number of active data subcarriers based on these input OFDM parameters: FFT length, CP length, number of left and right guard carriers, and DC null insertion status.

When you set the **OFDM parameters source** parameter to
`Property`

, these equations apply.

*N*_{h}=`ceil`

((**FFT length**– (**Number of left guard subcarriers**+**Number of right guard subcarriers**+**Insert DC Null**))/*vecLen*)*N*_{l}=`ceil`

((**FFT length**+**Cyclic prefix length**))/*vecLen*) –*N*_{h}

When you set the **OFDM parameters source** parameter to
`Input port`

, these equations apply.

*N*_{h}=`ceil`

((**FFTLen**– (**numLgSc**+**numRgSc**+**Insert DC Null**))/*vecLen*)*N*_{l}=`ceil`

((**Maximum FFT length**+**CPLen**))/*vecLen*) –*N*_{h}

In these equations,

*N*_{h}is the number of high ready clock cycles*N*_{l}is the number of low ready clock cycles*vecLen*is the length of the vector

This figure shows the ready signal generation for the default block configuration
(**FFT length** = `64`

, **Cyclic prefix
length** = `16`

, **Number of left guard
subcarriers** = `6`

, **Number of right guard
subcarriers** = `5`

and **Insert DC Null** =
`on`

) with a scalar input.

This figure shows the ready signal generation for the default block configuration
(**FFT length** = `64`

, **Cyclic prefix
length** = `16`

, **Number of left guard
subcarriers** = `6`

, **Number of right guard
subcarriers** = `5`

and **Insert DC Null** =
`on`

) with a four-element column vector input.

The block stores input valid active subcarrier data, reads it, and forms a symbol of FFT length by placing the data at the center, and guard subcarriers at the edges of the symbol based on the number of left and right guard subcarrier values provided.

This block repeats FFT-length number of samples until it forms the maximum FFT length.
For this operation, the block buffers the input samples first and then repeats the samples
based on the maximum FFT length value. This repetition mechanism helps to avoid scaling at
the FFT block input. This block is optional and available only when you set the
**OFDM parameters source** parameter to ```
Input
port
```

. When you set the **OFDM parameters source** parameter
to `Property`

, the FFT length value provided in the block mask is
set as the maximum FFT length. The block does not need to repeat the samples in this
context.

For example, if the FFT length is 128 and the maximum FFT length is 2048, each OFDM symbol consists of 128 samples. The block converts these 128 samples to 2048 samples by repeating the 128 samples 16 times. After the block generates 2048 data samples, it sends data and valid input signals to the next block.

The IFFT block converts a frequency-domain signal to a time-domain signal. The block supports the FFT length as a power of 2, in the range from 8 to 65, 536.

The **Divide butterfly outputs by two** parameter sets whether the FFT
implements an overall 1/*N* scale factor by dividing the output of each
butterfly multiplication by two. This adjustment keeps the output of the IFFT in the same
amplitude range as its input. When you clear the **Divide butterfly outputs by
two** parameter, the block avoids overflow by increasing the word length by 1 bit
after each butterfly multiplication.

Conventionally, transceivers perform an FFT shift in the frequency domain. However, this method requires memory and introduces latency related to the size of the FFT. Instead, a transceiver can execute the same operation in the time domain by using the frequency shifting property of Fourier transforms. Shifting a function in one domain corresponds to a multiplication by a complex exponential function in the other domain. To reduce hardware resources and latency, this block performs the FFT shift by multiplying the time-domain samples by a complex exponential function.

These equations describe an FFT shift. The equation for an *N*-point
FFT is

$$X(k)=F[x(n)]={\displaystyle \sum _{n=0}^{N-1}x(n){e}^{-\frac{j2\pi nk}{N}}}$$

For an FFT shift of *N*/2 carriers in either direction, substitute $$k=k-\frac{N}{2}$$, resulting in

$$X(k-{\scriptscriptstyle \frac{N}{2}})={\displaystyle \sum _{n=0}^{N-1}x(n){e}^{-\frac{j2\pi n(k-{\scriptscriptstyle \frac{N}{2}})}{N}}}$$

This equation simplifies to

$$X(k-\frac{N}{2})={\displaystyle \sum _{n=0}^{N-1}{e}^{j\pi n}x(n){e}^{-\frac{j2\pi nk}{N}}}$$

Since $$\sum _{n=0}^{N-1}x(n){e}^{-\frac{j2\pi nk}{N}}$$ is equivalent to $$F[x(n)]$$, and $${e}^{j\pi}=-1$$, this equation simplifies to

$$X(k-\frac{N}{2})=F[{{\displaystyle (-1)}}^{n}x(n)]$$

The final equation shows that an FFT shift in the time domain simplifies to
multiplication by (-1)^{n}. Therefore, the block
implements the FFT shift by multiplying the time-domain samples by either +1 or –1.

This block down samples the maximum FFT length number of samples to FFT length number of
samples. This block is optional and available only when the **OFDM parameters
source** parameter is set to `Input port`

. When
**OFDM parameters source** is set to `Property`

,
the FFT length value provided in the block mask is considered as the maximum FFT length. So,
there is no need to downsample the samples in this context.

For example, the block is operating with FFT length as 128 and the maximum FFT length is 2048. Here, the input is 2048 samples and it must be downsampled with respective to the FFT length 128. So, the block samples 1 sample for every 16 samples.

Cyclic prefix addition is the process of adding the last samples of an OFDM symbol as a
prefix to each OFDM symbol. This figures shows CP addition for an OFDM symbol with
*Nfft* samples and CP samples
*N*_{CP}.

When the OFDM Modulator block operates through ```
Input
port
```

selection, it uses the **Maximum FFT length** parameter
to avoid multiple IFFTs.

Windowing reduces the spectral regrowth, or adjacent channel leakage ratio (ACLR), of an
OFDM signal. Windowing is optional and supports scalar and vector inputs. To enable
windowing, select the **Windowing** parameter.

The blocks performs windowing on the CP-added OFDM symbols. For more information about windowing, see the OFDM Modulator Baseband block.

The latency of the block varies with the type of input: scalar or vector.

This figure shows a sample output and latency of the OFDM Modulator
block when you specify a scalar input, set the **OFDM parameters source**
parameter to `Property`

and use default settings for the other
block parameters. **FFT length** is set to `64`

,
**Cyclic prefix length** is set to `16`

,
**Insert DC null status** is set to `on`

, and
**Number of left guard subcarriers** and **Number of right
guard subcarriers** are set to `6`

and `5`

,
respectively.

In this example, the latency of the block is calculated using this formula:
**FFT length** – (**Number of left guard subcarriers**
+ **Number of right guard subcarriers** + **Insert DC null
status**) + *IFFTLatency* + **FFT length** +
22, where *IFFTLatency* is the latency of IFFT block for
the specified FFT length, and 22 is the number of pipeline delays.

This calculation shows that the latency of the block is 311 clock cycles, as shown in this figure.

This figure shows a sample output and latency of the block when you specify a scalar
input and set the **OFDM parameters source** parameter to
`Input port`

. For this example, **FFTLen** is
set to `64`

, **CPLen** is set to `16`

,
**Insert DC null status** is set to `on`

,
**numLgSc** and **numRgSc** are set to
`6`

and `5`

, respectively, and **Maximum FFT
length** is set to `128`

.

In this example, the latency of the block is calculated using this formula:
**FFTLen** – (**numLgSc** +
**numRgSc** + **Insert DC null status**) +
**FFT length** + *IFFTLatency* + **Maximum FFT
length** + (**Maximum FFT length**/**FFTLen**
– 1) + 32, where *IFFTLatency* is the latency of IFFT
block for the specified maximum FFT length, and 32 is the number of pipeline
delays.

This calculation shows that the latency of the block is 582 clock cycles, as shown in this figure.

The block accepts input only when the **ready** signal is
`1`

(high). In this case, the block captures parameters on the first
cycle when the input **valid** signal is `1`

(high).

This figure shows a sample output and latency of the OFDM Modulator
block when you specify an eight-element column vector input, set the **OFDM
parameters source** parameter to `Property`

and use
default settings for the other block parameters. **FFT length** is set to
`64`

, **Cyclic prefix length** is set to
`16`

, **Insert DC null status** is set to
`on`

, and **Number of left guard subcarriers** and
**Number of right guard subcarriers** are set to `6`

and `5`

, respectively.

In this example, the latency of the block is calculated using this formula:
`ceil`

((**FFT length** – (**Number of left
guard subcarriers** + **Number of right guard subcarriers** +
**Insert DC null status**))/*vecLen*) +
*vecIFFTLatency* + `ceil`

(**FFT
length**/*vecLen*) + 22, where
*vecIFFTLatency* is the latency of IFFT block for the
specified FFT length and vector length, *vecLen* is the length of the
vector, and 22 is the number of pipeline delays.

This calculation shows that the latency of the block is 104 clock cycles, as shown in this figure.

This figure shows a sample output and latency of the OFDM Modulator
block when you specify an eight-element column vector input and set the **OFDM
parameters source** parameter to `Input port`

. For
this example, **FFTLen** is set to `64`

,
**CPLen** is set to `16`

, **Insert DC null
status** is set to `on`

, **numLgSc** and
**numRgSc** are set to `6`

and `5`

,
respectively, and **Maximum FFT length** is set to
`128`

.

In this example, the latency of the block is calculated using this formula:
`ceil`

((**FFTLen** – (**numLgSc** +
**numRgSc** + **Insert DC null
status**))/*vecLen*) +
**FFTLen**/*vecLen* +
*vecIFFTLatency* + `floor`

((**Maximum FFT
length**/**FFTLen**) * (*vecLen* –
1)/*vecLen*) + `ceil`

(**Maximum FFT
length**/*vecLen*) – (**Maximum FFT
length**/**FFTLen** – 1) + 32, where
*vecIFFTLatency* is the latency of IFFT block for the
specified maximum FFT length and vector length, *vecLen* is the length of
the vector, and 32 is the number of pipeline delays.

This calculation shows that the latency of the block is 160 clock cycles, as shown in this figure.

The block accepts input only when the **ready** signal is
`1`

(high). In this case, the block captures parameters on the first
cycle when the input **valid** signal is `1`

(high).

The performance of the synthesized HDL code varies with your target and synthesis
options. The input data type used in this example for generating HDL code is
`fixdt(1,16,14)`

.

This table shows the resource and performance data synthesis results when using the
block with a default configuration for a scalar input and an eight-element column vector
input. The generated HDL is targeted to the Xilinx^{®}
Zynq^{®}- 7000 ZC706 evaluation board.

Input Data | Slice LUTs | Slice Registers | DSPs | Block RAMs | Maximum Frequency in MHz |
---|---|---|---|---|---|

Scalar | 2389 | 4103 | 8 | 3 | 263.4 |

Vector | 12311 | 21705 | 56 | 16 | 236.3 |

[1] 3GPP TS 36.211 version 14.2.0
Release 14. "Physical channels and modulation." *LTE - Evolved Universal Terrestrial
Radio Access (E-UTRA)*.

[2] "Wireless LAN Medium Access Control (MAC) and Physical layer (PHY) Specifications." IEEE Std 802.11 – 2012.

[3] Stefania Sesia, Issam Toufik, and
Matthew baker. *LTE - THE UMTS Long Term Evolution from theory to
practice*.

[4] Erik Dahlman, Stefan Parkvall, and
Johan Skold. *4G - LTE/LTE - Advanced for Mobile broadband Second
edition*.

Generate C and C++ code using Simulink® Coder™.

This block supports C/C++ code generation for Simulink^{®} accelerator and rapid accelerator modes and for DPI component generation.

Generate Verilog and VHDL code for FPGA and ASIC designs using HDL Coder™.

HDL Coder™ provides additional configuration options that affect HDL implementation and synthesized logic.

This block does not have any HDL Block Properties.

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