HDL Code Generation for NI USRP Radios

R2026b

Wireless Testbench™ provides an FPGA targeting workflow that enables you to design custom software-defined radio (SDR) algorithms in Simulink^® and deploy them on supported NI™ USRP™ radios. Use MATLAB^® interfaces to connect to the target radio and verify the deployed system running on hardware. This diagram is a high-level overview of how HDL code generation with Wireless Testbench leverages the capabilities of supported radios.

The Wireless Testbench Target NI USRP Radios Workflow enables you to implement a Simulink model for an SDR algorithm and generate HDL code that you deploy on the FPGA of supported radios.

After deployment, connect to the target NI USRP radio and exercise your deployed system using the usrp and fpga interfaces.

Wireless Testbench MATLAB Interface	Description
usrp System object™	Control an NI USRP radio running a custom FPGA image to: Configure radio front-end properties Stream samples from the radio front end Transmit and capture waveforms to exercise your DUT
fpga object	Connect from MATLAB to the DUT (user logic) on the FPGA of an NI USRP radio to read and write registers and stream data.

Required MathWorks Products

To use this workflow, you require the following MathWorks products:

• Wireless Testbench Support Package for NI USRP Radios

• Simulink

• HDL Coder™

Hardware, Software, and System Requirements

To target NI USRP radio devices with Wireless Testbench, you must install and configure third-party tools and additional support packages. For details, see Installation for Targeting NI USRP Radios.

For details about which NI USRP radios you can target, see Supported Radio Devices.

Note

Generating a bitstream with this workflow is supported only on a Linux^® operating system (OS). For details about host system requirements, see System Requirements.