How to enable dynamic memory allocation in HDL coder?

Hi all,

I'm trying to use the HDL-coder, but run into a little snag at the HDL Code Generation step using the Workflow Advisor.

The inputs of my function are a

complex(double(:inf x 1)) and double(1x1)

the fixed point conversion works or at least validates the work. Here a few local variables and outputs do again have :inf allocation.

workflow is just Generic ASIC/FPGA, since I'm just trying to get some HDL-code. It doesn't have to be perfect now, but I'm just curious IF it will work. Now the next step is the HDL Code Generation. Both for VHDL and Verilog, I'm receiving the following error:

??? Computed maximum size is not bounded.
Static memory allocation requires all sizes to be bounded.
The computed size is [1 x :? x :127].
Please consider enabling dynamic memory allocation to allow unbounded sizes.
More information
Error in ==> fpga_test_fixpt Line: 30 Column: 10
### Code generation failed: Open error report.

Now going to the help it says the following:

1.In the MATLAB Coder project, click the Build tab.

2.On the Build tab, click the Moresettings link to view the project settings for the selectedoutput type.

3.In the Project Settings dialogbox, click the Memory tab.

4.On the Memory tab, set Dynamicmemory allocation to one of the following options: 'never','for all variable-sized array' etc.

But the Build tab is nowhere to be found in the HDL coder. However in the MEX/C coder it is. But as you guessed, I need the Dynamic memory allocation in the HDL.

Does anyone know how to do this? Or is it simply not possible in VHDL/Verilog to use dynamic memory? and should I define the variables more carefully?

I'm using MATLAB R2013b with all toolboxes on windows 8 64bit.

Answer 1

[Walter Roberson]

You need finite bounds for the arrays, as it is necessary to generate the complete low-level description to flash gate-wise onto the chip. FPGA cannot grow their own memory during operation.

[Niek]

Thanks for the help,

my next problem however is that I can't define my boundaries to the local variables. I initialized them all with zeros() with the correct lengths.

[Walter Roberson]

Sorry, I do not understand what you mean about you cannot "define my boundaries to the local variables" ?

[Niek]

Well, here is my workflow advisor as I see it. As you can see COM, Xcorr_zero and sig all have :Inf in there Type statements.

I thought by explicitly allocating memory through the zeros() statements in the top of my code the workflow adviser would change it to the size that's been allocated. But as you can clearly see this didn't happen.

I can't click and change them either, so do you know how I can apply the finite bounds for the arrays?

EDIT: I think I found the problem. The memory allocation and the for-loop integer can't be dependent on the inputs of the function. Also, the statement ":end" can't be in there.

So technically I need to write a "static" function under the assumption that I have prior knowledge about the input. I hoped it would be possible to write a little bit more dynamic function, but that's probably not possible with VHDL?

Thanks for your help anyway!